mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 03:08:31 +00:00
690 lines
16 KiB
C
690 lines
16 KiB
C
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// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*/
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#include <common.h>
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#include <adc.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <bootm.h>
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#include <clk.h>
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#include <config.h>
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#include <dm.h>
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#include <dm/device.h>
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#include <dm/uclass.h>
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#include <env.h>
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#include <env_internal.h>
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#include <g_dnl.h>
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#include <generic-phy.h>
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#include <hang.h>
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#include <i2c.h>
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#include <i2c_eeprom.h>
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#include <init.h>
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#include <led.h>
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#include <memalign.h>
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#include <misc.h>
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#include <mtd.h>
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#include <mtd_node.h>
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#include <netdev.h>
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#include <phy.h>
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#include <power/regulator.h>
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#include <remoteproc.h>
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#include <reset.h>
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#include <syscon.h>
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#include <usb.h>
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#include <usb/dwc2_udc.h>
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#include <watchdog.h>
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/* SYSCFG registers */
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#define SYSCFG_BOOTR 0x00
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#define SYSCFG_PMCSETR 0x04
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#define SYSCFG_IOCTRLSETR 0x18
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#define SYSCFG_ICNR 0x1C
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#define SYSCFG_CMPCR 0x20
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#define SYSCFG_CMPENSETR 0x24
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#define SYSCFG_PMCCLRR 0x44
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#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
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#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
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#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
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#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
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#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
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#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
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#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
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#define SYSCFG_CMPCR_SW_CTRL BIT(1)
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#define SYSCFG_CMPCR_READY BIT(8)
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#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
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#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
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#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
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#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
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#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
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#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
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#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
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#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
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/*
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* Get a global data pointer
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*/
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DECLARE_GLOBAL_DATA_PTR;
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int setup_mac_address(void)
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{
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struct udevice *dev;
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ofnode eeprom;
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unsigned char enetaddr[6];
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int ret;
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ret = eth_env_get_enetaddr("ethaddr", enetaddr);
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if (ret) /* ethaddr is already set */
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return 0;
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eeprom = ofnode_path("/soc/i2c@5c002000/eeprom@50");
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if (!ofnode_valid(eeprom)) {
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printf("Invalid hardware path to EEPROM!\n");
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return -ENODEV;
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}
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ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
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if (ret) {
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printf("Cannot find EEPROM!\n");
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return ret;
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}
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ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
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if (ret) {
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printf("Error reading configuration EEPROM!\n");
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return ret;
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}
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if (is_valid_ethaddr(enetaddr))
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eth_env_set_enetaddr("ethaddr", enetaddr);
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return 0;
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}
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int checkboard(void)
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{
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char *mode;
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const char *fdt_compat;
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int fdt_compat_len;
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if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
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mode = "trusted with OP-TEE";
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else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
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mode = "trusted";
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else
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mode = "basic";
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printf("Board: stm32mp1 in %s mode", mode);
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fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
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&fdt_compat_len);
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if (fdt_compat && fdt_compat_len)
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printf(" (%s)", fdt_compat);
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puts("\n");
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return 0;
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}
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static void board_key_check(void)
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{
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#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
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ofnode node;
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struct gpio_desc gpio;
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enum forced_boot_mode boot_mode = BOOT_NORMAL;
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node = ofnode_path("/config");
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if (!ofnode_valid(node)) {
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debug("%s: no /config node?\n", __func__);
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return;
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}
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#ifdef CONFIG_FASTBOOT
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if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
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&gpio, GPIOD_IS_IN)) {
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debug("%s: could not find a /config/st,fastboot-gpios\n",
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__func__);
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} else {
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if (dm_gpio_get_value(&gpio)) {
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puts("Fastboot key pressed, ");
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boot_mode = BOOT_FASTBOOT;
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}
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dm_gpio_free(NULL, &gpio);
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}
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#endif
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#ifdef CONFIG_CMD_STM32PROG
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if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
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&gpio, GPIOD_IS_IN)) {
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debug("%s: could not find a /config/st,stm32prog-gpios\n",
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__func__);
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} else {
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if (dm_gpio_get_value(&gpio)) {
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puts("STM32Programmer key pressed, ");
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boot_mode = BOOT_STM32PROG;
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}
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dm_gpio_free(NULL, &gpio);
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}
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#endif
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if (boot_mode != BOOT_NORMAL) {
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puts("entering download mode...\n");
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clrsetbits_le32(TAMP_BOOT_CONTEXT,
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TAMP_BOOT_FORCED_MASK,
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boot_mode);
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}
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#endif
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}
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#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
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#include <usb/dwc2_udc.h>
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int g_dnl_board_usb_cable_connected(void)
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{
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struct udevice *dwc2_udc_otg;
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int ret;
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ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
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DM_GET_DRIVER(dwc2_udc_otg),
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&dwc2_udc_otg);
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if (!ret)
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debug("dwc2_udc_otg init failed\n");
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return dwc2_udc_B_session_valid(dwc2_udc_otg);
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}
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#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
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#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
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int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
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{
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if (!strcmp(name, "usb_dnl_dfu"))
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put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
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else if (!strcmp(name, "usb_dnl_fastboot"))
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put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
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&dev->idProduct);
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else
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put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
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return 0;
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}
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#endif /* CONFIG_USB_GADGET */
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#ifdef CONFIG_LED
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static int get_led(struct udevice **dev, char *led_string)
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{
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char *led_name;
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int ret;
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led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
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if (!led_name) {
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pr_debug("%s: could not find %s config string\n",
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__func__, led_string);
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return -ENOENT;
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}
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ret = led_get_by_label(led_name, dev);
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if (ret) {
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debug("%s: get=%d\n", __func__, ret);
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return ret;
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}
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return 0;
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}
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static int setup_led(enum led_state_t cmd)
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{
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struct udevice *dev;
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int ret;
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ret = get_led(&dev, "u-boot,boot-led");
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if (ret)
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return ret;
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ret = led_set_state(dev, cmd);
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return ret;
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}
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#endif
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static void __maybe_unused led_error_blink(u32 nb_blink)
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{
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#ifdef CONFIG_LED
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int ret;
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struct udevice *led;
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u32 i;
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#endif
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if (!nb_blink)
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return;
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#ifdef CONFIG_LED
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ret = get_led(&led, "u-boot,error-led");
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if (!ret) {
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/* make u-boot,error-led blinking */
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/* if U32_MAX and 125ms interval, for 17.02 years */
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for (i = 0; i < 2 * nb_blink; i++) {
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led_set_state(led, LEDST_TOGGLE);
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mdelay(125);
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WATCHDOG_RESET();
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}
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}
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#endif
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/* infinite: the boot process must be stopped */
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if (nb_blink == U32_MAX)
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hang();
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}
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static void sysconf_init(void)
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{
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#ifndef CONFIG_STM32MP1_TRUSTED
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u8 *syscfg;
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#ifdef CONFIG_DM_REGULATOR
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struct udevice *pwr_dev;
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struct udevice *pwr_reg;
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struct udevice *dev;
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int ret;
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u32 otp = 0;
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#endif
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u32 bootr;
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syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
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/* interconnect update : select master using the port 1 */
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/* LTDC = AXI_M9 */
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/* GPU = AXI_M8 */
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/* today information is hardcoded in U-Boot */
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writel(BIT(9), syscfg + SYSCFG_ICNR);
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/* disable Pull-Down for boot pin connected to VDD */
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bootr = readl(syscfg + SYSCFG_BOOTR);
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bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
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bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
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writel(bootr, syscfg + SYSCFG_BOOTR);
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#ifdef CONFIG_DM_REGULATOR
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/* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
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* and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
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* The customer will have to disable this for low frequencies
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* or if AFMUX is selected but the function not used, typically for
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* TRACE. Otherwise, impact on power consumption.
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*
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* WARNING:
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* enabling High Speed mode while VDD>2.7V
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* with the OTP product_below_2v5 (OTP 18, BIT 13)
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* erroneously set to 1 can damage the IC!
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* => U-Boot set the register only if VDD < 2.7V (in DT)
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* but this value need to be consistent with board design
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*/
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ret = uclass_get_device_by_driver(UCLASS_PMIC,
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DM_GET_DRIVER(stm32mp_pwr_pmic),
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&pwr_dev);
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if (!ret) {
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_GET_DRIVER(stm32mp_bsec),
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&dev);
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if (ret) {
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pr_err("Can't find stm32mp_bsec driver\n");
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return;
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}
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ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
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if (ret > 0)
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otp = otp & BIT(13);
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/* get VDD = vdd-supply */
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ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
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&pwr_reg);
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/* check if VDD is Low Voltage */
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if (!ret) {
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if (regulator_get_value(pwr_reg) < 2700000) {
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writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
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SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
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SYSCFG_IOCTRLSETR_HSLVEN_ETH |
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SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
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SYSCFG_IOCTRLSETR_HSLVEN_SPI,
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syscfg + SYSCFG_IOCTRLSETR);
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if (!otp)
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pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
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} else {
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if (otp)
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pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
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}
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} else {
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debug("VDD unknown");
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}
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}
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#endif
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/* activate automatic I/O compensation
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* warning: need to ensure CSI enabled and ready in clock driver
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*/
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writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
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while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
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;
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clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
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#endif
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}
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/* board dependent setup after realloc */
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int board_init(void)
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{
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struct udevice *dev;
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/* address of boot parameters */
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gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
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/* probe all PINCTRL for hog */
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for (uclass_first_device(UCLASS_PINCTRL, &dev);
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dev;
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uclass_next_device(&dev)) {
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pr_debug("probe pincontrol = %s\n", dev->name);
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}
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board_key_check();
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#ifdef CONFIG_DM_REGULATOR
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regulators_enable_boot_on(_DEBUG);
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#endif
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sysconf_init();
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if (CONFIG_IS_ENABLED(CONFIG_LED))
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led_default_state();
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return 0;
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}
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int board_late_init(void)
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{
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char *boot_device;
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#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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const void *fdt_compat;
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int fdt_compat_len;
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fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
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&fdt_compat_len);
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if (fdt_compat && fdt_compat_len) {
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if (strncmp(fdt_compat, "st,", 3) != 0)
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||
|
env_set("board_name", fdt_compat);
|
||
|
else
|
||
|
env_set("board_name", fdt_compat + 3);
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
/* Check the boot-source to disable bootdelay */
|
||
|
boot_device = env_get("boot_device");
|
||
|
if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
|
||
|
env_set("bootdelay", "0");
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
void board_quiesce_devices(void)
|
||
|
{
|
||
|
#ifdef CONFIG_LED
|
||
|
setup_led(LEDST_OFF);
|
||
|
#endif
|
||
|
}
|
||
|
|
||
|
/* eth init function : weak called in eqos driver */
|
||
|
int board_interface_eth_init(struct udevice *dev,
|
||
|
phy_interface_t interface_type)
|
||
|
{
|
||
|
u8 *syscfg;
|
||
|
u32 value;
|
||
|
bool eth_clk_sel_reg = false;
|
||
|
bool eth_ref_clk_sel_reg = false;
|
||
|
|
||
|
/* Gigabit Ethernet 125MHz clock selection. */
|
||
|
eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
|
||
|
|
||
|
/* Ethernet 50Mhz RMII clock selection */
|
||
|
eth_ref_clk_sel_reg =
|
||
|
dev_read_bool(dev, "st,eth_ref_clk_sel");
|
||
|
|
||
|
syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
|
||
|
|
||
|
if (!syscfg)
|
||
|
return -ENODEV;
|
||
|
|
||
|
switch (interface_type) {
|
||
|
case PHY_INTERFACE_MODE_MII:
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
|
||
|
SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
|
||
|
debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_GMII:
|
||
|
if (eth_clk_sel_reg)
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
|
||
|
SYSCFG_PMCSETR_ETH_CLK_SEL;
|
||
|
else
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
|
||
|
debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_RMII:
|
||
|
if (eth_ref_clk_sel_reg)
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_RMII |
|
||
|
SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
|
||
|
else
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_RMII;
|
||
|
debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
|
||
|
break;
|
||
|
case PHY_INTERFACE_MODE_RGMII:
|
||
|
case PHY_INTERFACE_MODE_RGMII_ID:
|
||
|
case PHY_INTERFACE_MODE_RGMII_RXID:
|
||
|
case PHY_INTERFACE_MODE_RGMII_TXID:
|
||
|
if (eth_clk_sel_reg)
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
|
||
|
SYSCFG_PMCSETR_ETH_CLK_SEL;
|
||
|
else
|
||
|
value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
|
||
|
debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
|
||
|
break;
|
||
|
default:
|
||
|
debug("%s: Do not manage %d interface\n",
|
||
|
__func__, interface_type);
|
||
|
/* Do not manage others interfaces */
|
||
|
return -EINVAL;
|
||
|
}
|
||
|
|
||
|
/* clear and set ETH configuration bits */
|
||
|
writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
|
||
|
SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
|
||
|
syscfg + SYSCFG_PMCCLRR);
|
||
|
writel(value, syscfg + SYSCFG_PMCSETR);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
enum env_location env_get_location(enum env_operation op, int prio)
|
||
|
{
|
||
|
if (prio)
|
||
|
return ENVL_UNKNOWN;
|
||
|
|
||
|
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
|
||
|
return ENVL_SPI_FLASH;
|
||
|
#else
|
||
|
return ENVL_NOWHERE;
|
||
|
#endif
|
||
|
}
|
||
|
|
||
|
#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
|
||
|
|
||
|
#define MTDPARTS_LEN 256
|
||
|
#define MTDIDS_LEN 128
|
||
|
|
||
|
/**
|
||
|
* The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
|
||
|
* If we need to access it before the env is relocated, then we need
|
||
|
* to use our own stack buffer. gd->env_buf will be too small.
|
||
|
*
|
||
|
* @param buf temporary buffer pointer MTDPARTS_LEN long
|
||
|
* @return mtdparts variable string, NULL if not found
|
||
|
*/
|
||
|
static const char *env_get_mtdparts(const char *str, char *buf)
|
||
|
{
|
||
|
if (gd->flags & GD_FLG_ENV_READY)
|
||
|
return env_get(str);
|
||
|
if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
|
||
|
return buf;
|
||
|
|
||
|
return NULL;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
|
||
|
*/
|
||
|
static void board_get_mtdparts(const char *dev,
|
||
|
char *mtdids,
|
||
|
char *mtdparts)
|
||
|
{
|
||
|
char env_name[32] = "mtdparts_";
|
||
|
char tmp_mtdparts[MTDPARTS_LEN];
|
||
|
const char *tmp;
|
||
|
|
||
|
/* name of env variable to read = mtdparts_<dev> */
|
||
|
strcat(env_name, dev);
|
||
|
tmp = env_get_mtdparts(env_name, tmp_mtdparts);
|
||
|
if (tmp) {
|
||
|
/* mtdids: "<dev>=<dev>, ...." */
|
||
|
if (mtdids[0] != '\0')
|
||
|
strcat(mtdids, ",");
|
||
|
strcat(mtdids, dev);
|
||
|
strcat(mtdids, "=");
|
||
|
strcat(mtdids, dev);
|
||
|
|
||
|
/* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
|
||
|
if (mtdparts[0] != '\0')
|
||
|
strncat(mtdparts, ";", MTDPARTS_LEN);
|
||
|
else
|
||
|
strcat(mtdparts, "mtdparts=");
|
||
|
strncat(mtdparts, dev, MTDPARTS_LEN);
|
||
|
strncat(mtdparts, ":", MTDPARTS_LEN);
|
||
|
strncat(mtdparts, tmp, MTDPARTS_LEN);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void board_mtdparts_default(const char **mtdids, const char **mtdparts)
|
||
|
{
|
||
|
struct udevice *dev;
|
||
|
static char parts[3 * MTDPARTS_LEN + 1];
|
||
|
static char ids[MTDIDS_LEN + 1];
|
||
|
static bool mtd_initialized;
|
||
|
|
||
|
if (mtd_initialized) {
|
||
|
*mtdids = ids;
|
||
|
*mtdparts = parts;
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
memset(parts, 0, sizeof(parts));
|
||
|
memset(ids, 0, sizeof(ids));
|
||
|
|
||
|
/* probe all MTD devices */
|
||
|
for (uclass_first_device(UCLASS_MTD, &dev);
|
||
|
dev;
|
||
|
uclass_next_device(&dev)) {
|
||
|
pr_debug("mtd device = %s\n", dev->name);
|
||
|
}
|
||
|
|
||
|
if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
|
||
|
board_get_mtdparts("nor0", ids, parts);
|
||
|
|
||
|
mtd_initialized = true;
|
||
|
*mtdids = ids;
|
||
|
*mtdparts = parts;
|
||
|
debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#if defined(CONFIG_OF_BOARD_SETUP)
|
||
|
int ft_board_setup(void *blob, bd_t *bd)
|
||
|
{
|
||
|
return 0;
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#ifdef CONFIG_SET_DFU_ALT_INFO
|
||
|
#define DFU_ALT_BUF_LEN SZ_1K
|
||
|
|
||
|
static void board_get_alt_info(const char *dev, char *buff)
|
||
|
{
|
||
|
char var_name[32] = "dfu_alt_info_";
|
||
|
int ret;
|
||
|
|
||
|
ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
|
||
|
|
||
|
/* name of env variable to read = dfu_alt_info_<dev> */
|
||
|
strcat(var_name, dev);
|
||
|
ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
|
||
|
if (ret) {
|
||
|
if (buff[0] != '\0')
|
||
|
strcat(buff, "&");
|
||
|
strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void set_dfu_alt_info(char *interface, char *devstr)
|
||
|
{
|
||
|
struct udevice *dev;
|
||
|
|
||
|
ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
|
||
|
|
||
|
if (env_get("dfu_alt_info"))
|
||
|
return;
|
||
|
|
||
|
memset(buf, 0, sizeof(buf));
|
||
|
|
||
|
/* probe all MTD devices */
|
||
|
mtd_probe_devices();
|
||
|
|
||
|
board_get_alt_info("ram", buf);
|
||
|
|
||
|
if (!uclass_get_device(UCLASS_MMC, 0, &dev))
|
||
|
board_get_alt_info("mmc0", buf);
|
||
|
|
||
|
if (!uclass_get_device(UCLASS_MMC, 1, &dev))
|
||
|
board_get_alt_info("mmc1", buf);
|
||
|
|
||
|
if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
|
||
|
board_get_alt_info("nor0", buf);
|
||
|
|
||
|
env_set("dfu_alt_info", buf);
|
||
|
puts("DFU alt info setting: done\n");
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
static void board_copro_image_process(ulong fw_image, size_t fw_size)
|
||
|
{
|
||
|
int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
|
||
|
|
||
|
if (!rproc_is_initialized())
|
||
|
if (rproc_init()) {
|
||
|
printf("Remote Processor %d initialization failed\n",
|
||
|
id);
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
ret = rproc_load(id, fw_image, fw_size);
|
||
|
printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
|
||
|
id, fw_image, fw_size, ret ? " Failed!" : " Success!");
|
||
|
|
||
|
if (!ret) {
|
||
|
rproc_start(id);
|
||
|
env_set("copro_state", "booted");
|
||
|
}
|
||
|
}
|
||
|
|
||
|
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);
|