u-boot/board/freescale/t4qds/Makefile

# SPDX-License-Identifier: GPL-2.0+
#
# Copyright 2012 Freescale Semiconductor, Inc.

ifdef CONFIG_SPL_BUILD
obj-y	+= spl.o
else
obj-$(CONFIG_TARGET_T4160QDS)	+= t4240qds.o eth.o
obj-$(CONFIG_TARGET_T4240QDS)	+= t4240qds.o eth.o
obj-$(CONFIG_PCI)	+= pci.o
endif

obj-y	+= ddr.o
obj-y	+= law.o
obj-y	+= tlb.o
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`# SPDX-License-Identifier: GPL-2.0+`
powerpc/t4qds: Add T4QDS board The T4240QDS is a high-performance computing evaluation, development and test platform supporting the T4240 QorIQ Power Architecture™ processor. SERDES Connections 32 lanes grouped into four 8-lane banks Two “front side” banks dedicated to Ethernet Two “back side” banks dedicated to other protocols DDR Controllers Three independant 64-bit DDR3 controllers Supports rates up to 2133 MHz data-rate Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller QIXIS System Logic FPGA Each DDR controller has two DIMM slots. The first slot of each controller has up to 4 chip selects to support single-, dual- and quad-rank DIMMs. The second slot has only 2 chip selects to support single- and dual-rank DIMMs. At any given time, up to total 4 chip selects can be used. Detail information can be found in doc/README.t4qds Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> 2012-10-11 07:13:37 +00:00			`#`
			`# Copyright 2012 Freescale Semiconductor, Inc.`

powerpc/T4QDS: add two stage boot of nand/sd Add support of 2 stage NAND/SD boot loader using SPL framework. PBL initialise the internal SRAM and copy SPL, this further initialise DDR using SPD and environment and copy u-boot from NAND/SD to DDR, finally SPL transfer control to u-boot. NOR uses CS1 instead of CS2 when NAND boot, fix it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 2014-04-22 07:10:44 +00:00			`ifdef CONFIG_SPL_BUILD`
freescale: Tweak various Makefiles to remove redundancy, fix aesthetics No intended functional change, just remove redundancies in some Makefiles, and make whitespace aesthetics uniform. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com> 2016-04-13 21:49:28 +00:00			`obj-y += spl.o`
powerpc/T4QDS: add two stage boot of nand/sd Add support of 2 stage NAND/SD boot loader using SPL framework. PBL initialise the internal SRAM and copy SPL, this further initialise DDR using SPD and environment and copy u-boot from NAND/SD to DDR, finally SPL transfer control to u-boot. NOR uses CS1 instead of CS2 when NAND boot, fix it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 2014-04-22 07:10:44 +00:00			`else`
powerpc: T4160QDS: Separate from T4240QDS in Kconfig Use TARGET_T4160QDS to simplify Kconfig options. Signed-off-by: York Sun <york.sun@nxp.com> 2016-11-21 21:19:14 +00:00			`obj-$(CONFIG_TARGET_T4160QDS) += t4240qds.o eth.o`
powerpc: T4240QDS: Remove macro CONFIG_T4240QDS Use CONFIG_TARGET_T4240QDS instead. Signed-off-by: York Sun <york.sun@nxp.com> 2016-11-21 21:22:08 +00:00			`obj-$(CONFIG_TARGET_T4240QDS) += t4240qds.o eth.o`
board: powerpc: convert makefiles to Kbuild style Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> 2013-10-21 02:53:38 +00:00			`obj-$(CONFIG_PCI) += pci.o`
powerpc/T4QDS: add two stage boot of nand/sd Add support of 2 stage NAND/SD boot loader using SPL framework. PBL initialise the internal SRAM and copy SPL, this further initialise DDR using SPD and environment and copy u-boot from NAND/SD to DDR, finally SPL transfer control to u-boot. NOR uses CS1 instead of CS2 when NAND boot, fix it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 2014-04-22 07:10:44 +00:00			`endif`
freescale: Tweak various Makefiles to remove redundancy, fix aesthetics No intended functional change, just remove redundancies in some Makefiles, and make whitespace aesthetics uniform. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com> 2016-04-13 21:49:28 +00:00
powerpc/T4QDS: add two stage boot of nand/sd Add support of 2 stage NAND/SD boot loader using SPL framework. PBL initialise the internal SRAM and copy SPL, this further initialise DDR using SPD and environment and copy u-boot from NAND/SD to DDR, finally SPL transfer control to u-boot. NOR uses CS1 instead of CS2 when NAND boot, fix it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 2014-04-22 07:10:44 +00:00			`obj-y += ddr.o`
board: powerpc: convert makefiles to Kbuild style Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de> 2013-10-21 02:53:38 +00:00			`obj-y += law.o`
			`obj-y += tlb.o`