2018-10-18 12:28:30 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2018 NXP
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* Peng Fan <peng.fan@nxp.com>
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2020-02-03 14:36:16 +00:00
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#include <malloc.h>
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2018-10-18 12:28:30 +00:00
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#include <asm/arch/sci/sci.h>
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#include <asm/arch/clock.h>
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#include <dt-bindings/clock/imx8qxp-clock.h>
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#include <dt-bindings/soc/imx_rsrc.h>
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#include <misc.h>
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2019-03-05 02:32:33 +00:00
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#include "clk-imx8.h"
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2018-10-18 12:28:30 +00:00
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2019-03-05 02:32:33 +00:00
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__weak ulong imx8_clk_get_rate(struct clk *clk)
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2018-10-18 12:28:30 +00:00
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{
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2019-03-05 02:32:33 +00:00
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return 0;
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2018-10-18 12:28:30 +00:00
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}
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2019-03-05 02:32:33 +00:00
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__weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)
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2018-10-18 12:28:30 +00:00
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{
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2019-03-05 02:32:33 +00:00
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return 0;
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2018-10-18 12:28:30 +00:00
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}
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2019-03-05 02:32:33 +00:00
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__weak int __imx8_clk_enable(struct clk *clk, bool enable)
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2018-10-18 12:28:30 +00:00
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{
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2021-03-24 21:26:08 +00:00
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return -EINVAL;
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2018-10-18 12:28:30 +00:00
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}
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static int imx8_clk_disable(struct clk *clk)
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{
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return __imx8_clk_enable(clk, 0);
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}
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static int imx8_clk_enable(struct clk *clk)
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{
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return __imx8_clk_enable(clk, 1);
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}
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#if CONFIG_IS_ENABLED(CMD_CLK)
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int soc_clk_dump(void)
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{
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struct udevice *dev;
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struct clk clk;
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unsigned long rate;
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int i, ret;
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ret = uclass_get_device_by_driver(UCLASS_CLK,
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2020-12-29 03:34:56 +00:00
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DM_DRIVER_GET(imx8_clk), &dev);
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2018-10-18 12:28:30 +00:00
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if (ret)
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return ret;
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printf("Clk\t\tHz\n");
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2019-03-05 02:32:33 +00:00
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for (i = 0; i < num_clks; i++) {
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2018-10-18 12:28:30 +00:00
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clk.id = imx8_clk_names[i].id;
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ret = clk_request(dev, &clk);
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if (ret < 0) {
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debug("%s clk_request() failed: %d\n", __func__, ret);
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continue;
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}
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ret = clk_get_rate(&clk);
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rate = ret;
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clk_free(&clk);
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2021-03-24 21:26:08 +00:00
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if (ret == -EINVAL) {
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2018-10-18 12:28:30 +00:00
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printf("clk ID %lu not supported yet\n",
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imx8_clk_names[i].id);
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continue;
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}
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if (ret < 0) {
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printf("%s %lu: get_rate err: %d\n",
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__func__, imx8_clk_names[i].id, ret);
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continue;
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}
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printf("%s(%3lu):\t%lu\n",
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imx8_clk_names[i].name, imx8_clk_names[i].id, rate);
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}
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return 0;
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}
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#endif
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static struct clk_ops imx8_clk_ops = {
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.set_rate = imx8_clk_set_rate,
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.get_rate = imx8_clk_get_rate,
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.enable = imx8_clk_enable,
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.disable = imx8_clk_disable,
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};
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static int imx8_clk_probe(struct udevice *dev)
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{
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return 0;
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}
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static const struct udevice_id imx8_clk_ids[] = {
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{ .compatible = "fsl,imx8qxp-clk" },
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2019-03-05 02:32:35 +00:00
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{ .compatible = "fsl,imx8qm-clk" },
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2018-10-18 12:28:30 +00:00
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{ },
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};
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U_BOOT_DRIVER(imx8_clk) = {
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.name = "clk_imx8",
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.id = UCLASS_CLK,
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.of_match = imx8_clk_ids,
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.ops = &imx8_clk_ops,
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.probe = imx8_clk_probe,
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.flags = DM_FLAG_PRE_RELOC,
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};
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