u-boot/arch/riscv/cpu/nx25/Makefile

#
# Copyright (C) 2017 Andes Technology Corporation
# Rick Chen, Andes Technology Corporation <rick@andestech.com>
#
# SPDX-License-Identifier:	GPL-2.0+
#

extra-y	= start.o

obj-y	:= cpu.o
riscv: cpu: Add nx25 to support RISC-V Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch Verifications: 1. startup and relocation ok. 2. boot from rom or ram both ok. 2. timer driver ok. 3. uart driver ok 4. mmc driver ok 5. spi driver ok. 6. 32/64 bit both ok. Detail verification message please see doc/README.ae250. Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com> Cc: Padmarao Begari <Padmarao.Begari@microsemi.com> 2017-12-26 05:55:48 +00:00			`#`
			`# Copyright (C) 2017 Andes Technology Corporation`
			`# Rick Chen, Andes Technology Corporation <rick@andestech.com>`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

			`extra-y = start.o`

			`obj-y := cpu.o`