2008-10-22 11:38:21 +00:00
|
|
|
/*
|
|
|
|
* (C) Copyright 2000-2003
|
|
|
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
|
|
*
|
2012-03-26 21:49:05 +00:00
|
|
|
* Copyright (C) 2004-2008, 2012 Freescale Semiconductor, Inc.
|
2008-10-22 11:38:21 +00:00
|
|
|
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
|
|
|
|
*
|
2013-07-08 07:37:19 +00:00
|
|
|
* SPDX-License-Identifier: GPL-2.0+
|
2008-10-22 11:38:21 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <config.h>
|
|
|
|
#include <common.h>
|
|
|
|
#include <asm/immap.h>
|
2012-03-26 21:49:05 +00:00
|
|
|
#include <asm/io.h>
|
2008-10-22 11:38:21 +00:00
|
|
|
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
|
|
|
|
int checkboard(void)
|
|
|
|
{
|
|
|
|
puts("Board: ");
|
|
|
|
puts("Freescale M53017EVB\n");
|
|
|
|
return 0;
|
|
|
|
};
|
|
|
|
|
|
|
|
phys_size_t initdram(int board_type)
|
|
|
|
{
|
2012-03-26 21:49:05 +00:00
|
|
|
sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
|
2008-10-22 11:38:21 +00:00
|
|
|
u32 dramsize, i;
|
|
|
|
|
|
|
|
dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
|
|
|
|
|
|
|
|
for (i = 0x13; i < 0x20; i++) {
|
|
|
|
if (dramsize == (1 << i))
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
i--;
|
|
|
|
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
|
2008-10-22 11:38:21 +00:00
|
|
|
#ifdef CONFIG_SYS_SDRAM_BASE1
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i);
|
2008-10-22 11:38:21 +00:00
|
|
|
#endif
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
|
|
|
|
out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
|
2008-10-22 11:38:21 +00:00
|
|
|
|
|
|
|
udelay(500);
|
|
|
|
|
|
|
|
/* Issue PALL */
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
|
2008-10-22 11:38:21 +00:00
|
|
|
asm("nop");
|
|
|
|
|
|
|
|
/* Perform two refresh cycles */
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
|
|
|
|
out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
|
2008-10-22 11:38:21 +00:00
|
|
|
asm("nop");
|
|
|
|
|
|
|
|
/* Issue LEMR */
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
|
2008-10-22 11:38:21 +00:00
|
|
|
asm("nop");
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
|
2008-10-22 11:38:21 +00:00
|
|
|
asm("nop");
|
|
|
|
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
|
2008-10-22 11:38:21 +00:00
|
|
|
asm("nop");
|
|
|
|
|
2012-03-26 21:49:05 +00:00
|
|
|
out_be32(&sdram->ctrl,
|
|
|
|
(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
|
2008-10-22 11:38:21 +00:00
|
|
|
asm("nop");
|
|
|
|
|
|
|
|
udelay(100);
|
|
|
|
|
|
|
|
return dramsize;
|
|
|
|
};
|
|
|
|
|
|
|
|
int testdram(void)
|
|
|
|
{
|
|
|
|
/* TODO: XXX XXX XXX */
|
|
|
|
printf("DRAM test not implemented!\n");
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|