2018-04-19 07:07:09 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Xilinx ZynqMP SoC Tap Delay Programming
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*
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* Copyright (C) 2018 Xilinx, Inc.
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*/
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#ifndef __ZYNQMP_TAP_DELAY_H__
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#define __ZYNQMP_TAP_DELAY_H__
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#ifdef CONFIG_ARCH_ZYNQMP
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void zynqmp_dll_reset(u8 deviceid);
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2020-10-23 10:59:04 +00:00
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void arasan_zynqmp_set_tapdelay(u8 device_id, u32 itap_delay, u32 otap_delay);
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2018-04-19 07:07:09 +00:00
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#else
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inline void zynqmp_dll_reset(u8 deviceid) {}
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2020-10-23 10:59:04 +00:00
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inline void arasan_zynqmp_set_tapdelay(u8 device_id, u32 itap_delay,
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u32 otap_delay) {}
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2018-04-19 07:07:09 +00:00
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#endif
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#endif
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