2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2017-09-24 06:00:25 +00:00
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/*
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* Copyright (C) 2015 CompuLab, Ltd.
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*
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* Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
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*/
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#ifndef __CL_SOM_IMX7_CONFIG_H
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#define __CL_SOM_IMX7_CONFIG_H
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#include "mx7_common.h"
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
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/* Network */
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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/* ENET1 */
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#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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/* I2C configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define SYS_I2C_BUS_SOM 0
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM
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#define CONFIG_PCA953X
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#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
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#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
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#undef CONFIG_SYS_AUTOLOAD
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#undef CONFIG_BOOTCOMMAND
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#define CONFIG_SYS_AUTOLOAD "no"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"autoload=off\0" \
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"script=boot.scr\0" \
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"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
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"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
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"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
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"bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
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"storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
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"kernel=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdtfile=imx7d-sbc-imx7.dtb\0" \
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"fdtaddr=0x83000000\0" \
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"mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
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"usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
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"doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
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"mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
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"mmcbootscript=" \
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"if run mmc_config; then " \
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"setenv storagetype mmc;" \
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"setenv storagedev ${mmcdev}:${mmcpart};" \
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"if run loadscript; then " \
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"run bootscript; " \
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"fi; " \
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"fi;\0" \
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"mmcboot=" \
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"if run mmc_config; then " \
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"setenv storagetype mmc;" \
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"setenv storagedev ${mmcdev}:${mmcpart};" \
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"if run loadkernel; then " \
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"if run loadfdt; then " \
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"run storagebootcmd;" \
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"fi; " \
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"fi; " \
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"fi;\0" \
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"sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
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"run mmcbootscript\0" \
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"usbbootscript=setenv usbdev ${usbdev_def}; " \
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"setenv storagetype usb;" \
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"setenv storagedev ${usbdev}:${usbpart};" \
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"if run loadscript; then " \
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"run bootscript; " \
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"fi; " \
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"sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
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"emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
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"emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
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#define CONFIG_BOOTCOMMAND \
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"echo SD boot attempt ...; run sdbootscript; run sdboot; " \
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"echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
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"echo USB boot attempt ...; run usbbootscript; "
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* SPI Flash support */
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/* FLASH and environment organization */
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/* MMC Config*/
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#ifdef CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
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#endif
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* Uncomment to enable iMX thermal driver support */
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/*#define CONFIG_IMX_THERMAL*/
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/* SPL */
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#include "imx7_spl.h"
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#endif /* __CONFIG_H */
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