mirror of
https://github.com/AsahiLinux/u-boot
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52 lines
1.8 KiB
ArmAsm
52 lines
1.8 KiB
ArmAsm
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/*
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* relocate - i.MX27-specific vector relocation
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*
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* Copyright (c) 2013 Albert ARIBAUD <albert.u.boot@aribaud.net>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include <linux/linkage.h>
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/*
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* The i.MX27 SoC is very specific with respect to exceptions: it
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* does not provide RAM at the high vectors address (0xFFFF0000),
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* thus only the low address (0x00000000) is useable; but that is
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* in ROM. Therefore, vectors cannot be changed at all.
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*
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* However, these ROM-based vectors actually just perform indirect
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* calls through pointers located in RAM at SoC-specific addresses,
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* as follows:
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*
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* Offset Exception Use by ROM code
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* 0x00000000 reset indirect branch to [0x00000014]
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* 0x00000004 undefined instruction indirect branch to [0xfffffef0]
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* 0x00000008 software interrupt indirect branch to [0xfffffef4]
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* 0x0000000c prefetch abort indirect branch to [0xfffffef8]
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* 0x00000010 data abort indirect branch to [0xfffffefc]
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* 0x00000014 (reserved in ARMv5) vector to ROM reset: 0xc0000000
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* 0x00000018 IRQ indirect branch to [0xffffff00]
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* 0x0000001c FIQ indirect branch to [0xffffff04]
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*
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* In order to initialize exceptions on i.MX27, we must copy U-Boot's
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* indirect (not exception!) vector table into 0xfffffef0..0xffffff04
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* taking care not to copy vectors number 5 (reserved exception).
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*/
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.section .text.relocate_vectors,"ax",%progbits
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ENTRY(relocate_vectors)
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ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */
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ldr r1, =32 /* size of vector table */
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add r0, r0, r1 /* skip to indirect table */
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ldr r1, =0xFFFFFEF0 /* i.MX27 indirect table */
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ldmia r0!, {r2-r8} /* load indirect vectors 1..7 */
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stmia r1!, {r2-r5, r7,r8} /* write all but vector 5 */
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bx lr
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ENDPROC(relocate_vectors)
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