2014-02-04 08:24:27 +00:00
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# ==========================================================================
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# Building
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# ==========================================================================
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kbuild: use Linux Kernel build scripts
Now we are ready to switch over to real Kbuild.
This commit disables temporary scripts:
scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
scripts/{Makefile.build,Makefile.host,Makefile.lib}.
This switch is triggered by the line in scripts/Kbuild.include
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.
Additionally, we need to fix compiler flags which are
locally added or removed.
In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-04 08:24:28 +00:00
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# Modified for U-Boot
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kconfig: switch to Kconfig
This commit enables Kconfig.
Going forward, we use Kconfig for the board configuration.
mkconfig will never be used. Nor will include/config.mk be generated.
Kconfig must be adjusted for U-Boot because our situation is
a little more complicated than Linux Kernel.
We have to generate multiple boot images (Normal, SPL, TPL)
from one source tree.
Each image needs its own configuration input.
Usage:
Run "make <board>_defconfig" to do the board configuration.
It will create the .config file and additionally spl/.config, tpl/.config
if SPL, TPL is enabled, respectively.
You can use "make config", "make menuconfig" etc. to create
a new .config or modify the existing one.
Use "make spl/config", "make spl/menuconfig" etc. for spl/.config
and do likewise for tpl/.config file.
The generic syntax of configuration targets for SPL, TPL is:
<target_image>/<config_command>
Here, <target_image> is either 'spl' or 'tpl'
<config_command> is 'config', 'menuconfig', 'xconfig', etc.
When the configuration is done, run "make".
(Or "make <board>_defconfig all" will do the configuration and build
in one time.)
For futher information of how Kconfig works in U-Boot,
please read the comment block of scripts/multiconfig.py.
By the way, there is another item worth remarking here:
coexistence of Kconfig and board herder files.
Prior to Kconfig, we used C headers to define a set of configs.
We expect a very long term to migrate from C headers to Kconfig.
Two different infractructure must coexist in the interim.
In our former configuration scheme, include/autoconf.mk was generated
for use in makefiles.
It is still generated under include/, spl/include/, tpl/include/ directory
for the Normal, SPL, TPL image, respectively.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:17 +00:00
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prefix := tpl
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src := $(patsubst $(prefix)/%,%,$(obj))
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ifeq ($(obj),$(src))
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prefix := spl
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src := $(patsubst $(prefix)/%,%,$(obj))
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ifeq ($(obj),$(src))
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prefix := .
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endif
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kbuild: use Linux Kernel build scripts
Now we are ready to switch over to real Kbuild.
This commit disables temporary scripts:
scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
scripts/{Makefile.build,Makefile.host,Makefile.lib}.
This switch is triggered by the line in scripts/Kbuild.include
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.
Additionally, we need to fix compiler flags which are
locally added or removed.
In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-04 08:24:28 +00:00
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endif
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2014-02-04 08:24:27 +00:00
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PHONY := __build
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__build:
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# Init all relevant variables used in kbuild files so
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# 1) they have correct type
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# 2) they do not inherit any value from the environment
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obj-y :=
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obj-m :=
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lib-y :=
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lib-m :=
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always :=
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targets :=
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subdir-y :=
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subdir-m :=
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EXTRA_AFLAGS :=
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EXTRA_CFLAGS :=
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EXTRA_CPPFLAGS :=
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EXTRA_LDFLAGS :=
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asflags-y :=
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ccflags-y :=
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cppflags-y :=
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ldflags-y :=
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subdir-asflags-y :=
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subdir-ccflags-y :=
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# Read auto.conf if it exists, otherwise ignore
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kconfig: switch to Kconfig
This commit enables Kconfig.
Going forward, we use Kconfig for the board configuration.
mkconfig will never be used. Nor will include/config.mk be generated.
Kconfig must be adjusted for U-Boot because our situation is
a little more complicated than Linux Kernel.
We have to generate multiple boot images (Normal, SPL, TPL)
from one source tree.
Each image needs its own configuration input.
Usage:
Run "make <board>_defconfig" to do the board configuration.
It will create the .config file and additionally spl/.config, tpl/.config
if SPL, TPL is enabled, respectively.
You can use "make config", "make menuconfig" etc. to create
a new .config or modify the existing one.
Use "make spl/config", "make spl/menuconfig" etc. for spl/.config
and do likewise for tpl/.config file.
The generic syntax of configuration targets for SPL, TPL is:
<target_image>/<config_command>
Here, <target_image> is either 'spl' or 'tpl'
<config_command> is 'config', 'menuconfig', 'xconfig', etc.
When the configuration is done, run "make".
(Or "make <board>_defconfig all" will do the configuration and build
in one time.)
For futher information of how Kconfig works in U-Boot,
please read the comment block of scripts/multiconfig.py.
By the way, there is another item worth remarking here:
coexistence of Kconfig and board herder files.
Prior to Kconfig, we used C headers to define a set of configs.
We expect a very long term to migrate from C headers to Kconfig.
Two different infractructure must coexist in the interim.
In our former configuration scheme, include/autoconf.mk was generated
for use in makefiles.
It is still generated under include/, spl/include/, tpl/include/ directory
for the Normal, SPL, TPL image, respectively.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 05:08:17 +00:00
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# Modified for U-Boot
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-include $(prefix)/include/config/auto.conf
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-include $(prefix)/include/autoconf.mk
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2014-02-04 08:24:32 +00:00
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2014-02-04 08:24:27 +00:00
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include scripts/Kbuild.include
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# For backward compatibility check that these variables do not change
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save-cflags := $(CFLAGS)
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# The filename Kbuild has precedence over Makefile
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
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include $(kbuild-file)
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2014-03-05 07:59:40 +00:00
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# Added for U-Boot
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asflags-y += $(PLATFORM_CPPFLAGS)
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ccflags-y += $(PLATFORM_CPPFLAGS)
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cppflags-y += $(PLATFORM_CPPFLAGS)
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2014-02-04 08:24:27 +00:00
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# If the save-* variables changed error out
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ifeq ($(KBUILD_NOPEDANTIC),)
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ifneq ("$(save-cflags)","$(CFLAGS)")
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$(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
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endif
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endif
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include scripts/Makefile.lib
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ifdef host-progs
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ifneq ($(hostprogs-y),$(host-progs))
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$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
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hostprogs-y += $(host-progs)
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endif
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endif
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# Do not include host rules unless needed
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ifneq ($(hostprogs-y)$(hostprogs-m),)
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include scripts/Makefile.host
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endif
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kbuild: use Linux Kernel build scripts
Now we are ready to switch over to real Kbuild.
This commit disables temporary scripts:
scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
scripts/{Makefile.build,Makefile.host,Makefile.lib}.
This switch is triggered by the line in scripts/Kbuild.include
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.
Additionally, we need to fix compiler flags which are
locally added or removed.
In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-04 08:24:28 +00:00
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# Uncommented for U-Boot
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# We need to create output dicrectory for SPL and TPL even for in-tree build
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#ifneq ($(KBUILD_SRC),)
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2014-02-04 08:24:27 +00:00
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# Create output directory if not already present
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_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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kbuild: use Linux Kernel build scripts
Now we are ready to switch over to real Kbuild.
This commit disables temporary scripts:
scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
scripts/{Makefile.build,Makefile.host,Makefile.lib}.
This switch is triggered by the line in scripts/Kbuild.include
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.
Additionally, we need to fix compiler flags which are
locally added or removed.
In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-04 08:24:28 +00:00
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#endif
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2014-02-04 08:24:27 +00:00
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ifndef obj
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$(warning kbuild: Makefile.build is included improperly)
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endif
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# ===========================================================================
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ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
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lib-target := $(obj)/lib.a
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endif
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ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
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builtin-target := $(obj)/built-in.o
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endif
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modorder-target := $(obj)/modules.order
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# We keep a list of all modules in $(MODVERDIR)
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__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
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$(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
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$(subdir-ym) $(always)
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@:
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# Linus' kernel sanity checking tool
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ifneq ($(KBUILD_CHECKSRC),0)
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ifeq ($(KBUILD_CHECKSRC),2)
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quiet_cmd_force_checksrc = CHECK $<
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cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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else
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quiet_cmd_checksrc = CHECK $<
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cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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endif
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endif
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# Do section mismatch analysis for each module/built-in.o
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ifdef CONFIG_DEBUG_SECTION_MISMATCH
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cmd_secanalysis = ; scripts/mod/modpost $@
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endif
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# Compile C sources (.c)
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# ---------------------------------------------------------------------------
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# Default is built-in, unless we know otherwise
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modkern_cflags = \
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$(if $(part-of-module), \
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$(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
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$(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
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quiet_modtag := $(empty) $(empty)
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$(real-objs-m) : part-of-module := y
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$(real-objs-m:.o=.i) : part-of-module := y
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$(real-objs-m:.o=.s) : part-of-module := y
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$(real-objs-m:.o=.lst): part-of-module := y
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$(real-objs-m) : quiet_modtag := [M]
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$(real-objs-m:.o=.i) : quiet_modtag := [M]
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$(real-objs-m:.o=.s) : quiet_modtag := [M]
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$(real-objs-m:.o=.lst): quiet_modtag := [M]
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$(obj-m) : quiet_modtag := [M]
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# Default for not multi-part modules
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modname = $(basetarget)
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$(multi-objs-m) : modname = $(modname-multi)
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$(multi-objs-m:.o=.i) : modname = $(modname-multi)
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$(multi-objs-m:.o=.s) : modname = $(modname-multi)
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$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
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$(multi-objs-y) : modname = $(modname-multi)
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$(multi-objs-y:.o=.i) : modname = $(modname-multi)
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$(multi-objs-y:.o=.s) : modname = $(modname-multi)
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$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
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quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
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2014-04-15 04:29:00 +00:00
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cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
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2014-02-04 08:24:27 +00:00
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$(obj)/%.s: $(src)/%.c FORCE
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$(call if_changed_dep,cc_s_c)
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quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
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cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
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$(obj)/%.i: $(src)/%.c FORCE
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$(call if_changed_dep,cc_i_c)
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cmd_gensymtypes = \
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$(CPP) -D__GENKSYMS__ $(c_flags) $< | \
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$(GENKSYMS) $(if $(1), -T $(2)) \
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$(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX)) \
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$(if $(KBUILD_PRESERVE),-p) \
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-r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
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quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
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cmd_cc_symtypes_c = \
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set -e; \
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$(call cmd_gensymtypes,true,$@) >/dev/null; \
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test -s $@ || rm -f $@
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$(obj)/%.symtypes : $(src)/%.c FORCE
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$(call cmd,cc_symtypes_c)
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# C (.c) files
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# The C file is compiled and updated dependency information is generated.
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# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
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quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
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ifndef CONFIG_MODVERSIONS
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
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else
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# When module versioning is enabled the following steps are executed:
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# o compile a .tmp_<file>.o from <file>.c
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# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
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# not export symbols, we just rename .tmp_<file>.o to <file>.o and
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# are done.
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# o otherwise, we calculate symbol versions using the good old
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# genksyms on the preprocessed source and postprocess them in a way
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# that they are usable as a linker script
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# o generate <file>.o from .tmp_<file>.o using the linker to
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# replace the unresolved symbols __crc_exported_symbol with
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# the actual value of the checksum generated by genksyms
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
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cmd_modversions = \
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if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
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$(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
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> $(@D)/.tmp_$(@F:.o=.ver); \
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\
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$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
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-T $(@D)/.tmp_$(@F:.o=.ver); \
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rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
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else \
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mv -f $(@D)/.tmp_$(@F) $@; \
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fi;
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endif
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ifdef CONFIG_FTRACE_MCOUNT_RECORD
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ifdef BUILD_C_RECORDMCOUNT
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ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
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RECORDMCOUNT_FLAGS = -w
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endif
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# Due to recursion, we must skip empty.o.
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# The empty.o file is created in the make process in order to determine
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# the target endianness and word size. It is made before all other C
|
|
|
|
# files, including recordmcount.
|
|
|
|
sub_cmd_record_mcount = \
|
|
|
|
if [ $(@) != "scripts/mod/empty.o" ]; then \
|
|
|
|
$(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
|
|
|
|
fi;
|
|
|
|
recordmcount_source := $(srctree)/scripts/recordmcount.c \
|
|
|
|
$(srctree)/scripts/recordmcount.h
|
|
|
|
else
|
|
|
|
sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
|
|
|
|
"$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
|
|
|
|
"$(if $(CONFIG_64BIT),64,32)" \
|
|
|
|
"$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
|
|
|
|
"$(LD)" "$(NM)" "$(RM)" "$(MV)" \
|
|
|
|
"$(if $(part-of-module),1,0)" "$(@)";
|
|
|
|
recordmcount_source := $(srctree)/scripts/recordmcount.pl
|
|
|
|
endif
|
|
|
|
cmd_record_mcount = \
|
|
|
|
if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
|
|
|
|
$(sub_cmd_record_mcount) \
|
|
|
|
fi;
|
|
|
|
endif
|
|
|
|
|
|
|
|
define rule_cc_o_c
|
|
|
|
$(call echo-cmd,checksrc) $(cmd_checksrc) \
|
|
|
|
$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
|
|
|
|
$(cmd_modversions) \
|
|
|
|
$(call echo-cmd,record_mcount) \
|
|
|
|
$(cmd_record_mcount) \
|
|
|
|
scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
|
|
|
|
$(dot-target).tmp; \
|
|
|
|
rm -f $(depfile); \
|
|
|
|
mv -f $(dot-target).tmp $(dot-target).cmd
|
|
|
|
endef
|
|
|
|
|
|
|
|
# Built-in and composite module parts
|
|
|
|
$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
|
|
|
|
$(call cmd,force_checksrc)
|
|
|
|
$(call if_changed_rule,cc_o_c)
|
|
|
|
|
|
|
|
# Single-part modules are special since we need to mark them in $(MODVERDIR)
|
|
|
|
|
|
|
|
$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
|
|
|
|
$(call cmd,force_checksrc)
|
|
|
|
$(call if_changed_rule,cc_o_c)
|
|
|
|
@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
|
|
|
|
|
|
|
|
quiet_cmd_cc_lst_c = MKLST $@
|
|
|
|
cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
|
|
|
|
$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
|
|
|
|
System.map $(OBJDUMP) > $@
|
|
|
|
|
|
|
|
$(obj)/%.lst: $(src)/%.c FORCE
|
|
|
|
$(call if_changed_dep,cc_lst_c)
|
|
|
|
|
|
|
|
# Compile assembler sources (.S)
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
|
|
|
|
|
|
|
|
$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
|
|
|
|
$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
|
|
|
|
|
|
|
|
quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
|
2014-06-16 09:56:38 +00:00
|
|
|
cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
|
2014-02-04 08:24:27 +00:00
|
|
|
|
|
|
|
$(obj)/%.s: $(src)/%.S FORCE
|
|
|
|
$(call if_changed_dep,as_s_S)
|
|
|
|
|
|
|
|
quiet_cmd_as_o_S = AS $(quiet_modtag) $@
|
|
|
|
cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
|
|
|
|
|
|
|
|
$(obj)/%.o: $(src)/%.S FORCE
|
|
|
|
$(call if_changed_dep,as_o_S)
|
|
|
|
|
|
|
|
targets += $(real-objs-y) $(real-objs-m) $(lib-y)
|
|
|
|
targets += $(extra-y) $(MAKECMDGOALS) $(always)
|
|
|
|
|
|
|
|
# Linker scripts preprocessor (.lds.S -> .lds)
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
quiet_cmd_cpp_lds_S = LDS $@
|
|
|
|
cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
|
|
|
|
-D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
|
|
|
|
|
|
|
|
$(obj)/%.lds: $(src)/%.lds.S FORCE
|
|
|
|
$(call if_changed_dep,cpp_lds_S)
|
|
|
|
|
|
|
|
# ASN.1 grammar
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
quiet_cmd_asn1_compiler = ASN.1 $@
|
|
|
|
cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
|
|
|
|
$(subst .h,.c,$@) $(subst .c,.h,$@)
|
|
|
|
|
|
|
|
.PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
|
|
|
|
|
|
|
|
$(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
|
|
|
|
$(call cmd,asn1_compiler)
|
|
|
|
|
|
|
|
# Build the compiled-in targets
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
# To build objects in subdirs, we need to descend into the directories
|
|
|
|
$(sort $(subdir-obj-y)): $(subdir-ym) ;
|
|
|
|
|
|
|
|
#
|
|
|
|
# Rule to compile a set of .o files into one .o file
|
|
|
|
#
|
|
|
|
ifdef builtin-target
|
|
|
|
quiet_cmd_link_o_target = LD $@
|
|
|
|
# If the list of objects to link is empty, just create an empty built-in.o
|
|
|
|
cmd_link_o_target = $(if $(strip $(obj-y)),\
|
|
|
|
$(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
|
|
|
|
$(cmd_secanalysis),\
|
|
|
|
rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
|
|
|
|
|
|
|
|
$(builtin-target): $(obj-y) FORCE
|
|
|
|
$(call if_changed,link_o_target)
|
|
|
|
|
|
|
|
targets += $(builtin-target)
|
|
|
|
endif # builtin-target
|
|
|
|
|
|
|
|
#
|
|
|
|
# Rule to create modules.order file
|
|
|
|
#
|
|
|
|
# Create commands to either record .ko file or cat modules.order from
|
|
|
|
# a subdirectory
|
|
|
|
modorder-cmds = \
|
|
|
|
$(foreach m, $(modorder), \
|
|
|
|
$(if $(filter %/modules.order, $m), \
|
|
|
|
cat $m;, echo kernel/$m;))
|
|
|
|
|
|
|
|
$(modorder-target): $(subdir-ym) FORCE
|
|
|
|
$(Q)(cat /dev/null; $(modorder-cmds)) > $@
|
|
|
|
|
|
|
|
#
|
|
|
|
# Rule to compile a set of .o files into one .a file
|
|
|
|
#
|
|
|
|
ifdef lib-target
|
|
|
|
quiet_cmd_link_l_target = AR $@
|
|
|
|
cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
|
|
|
|
|
|
|
|
$(lib-target): $(lib-y) FORCE
|
|
|
|
$(call if_changed,link_l_target)
|
|
|
|
|
|
|
|
targets += $(lib-target)
|
|
|
|
endif
|
|
|
|
|
|
|
|
#
|
|
|
|
# Rule to link composite objects
|
|
|
|
#
|
|
|
|
# Composite objects are specified in kbuild makefile as follows:
|
|
|
|
# <composite-object>-objs := <list of .o files>
|
|
|
|
# or
|
|
|
|
# <composite-object>-y := <list of .o files>
|
|
|
|
link_multi_deps = \
|
|
|
|
$(filter $(addprefix $(obj)/, \
|
|
|
|
$($(subst $(obj)/,,$(@:.o=-objs))) \
|
|
|
|
$($(subst $(obj)/,,$(@:.o=-y)))), $^)
|
2014-06-16 09:56:38 +00:00
|
|
|
|
2014-02-04 08:24:27 +00:00
|
|
|
quiet_cmd_link_multi-y = LD $@
|
|
|
|
cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
|
|
|
|
|
|
|
|
quiet_cmd_link_multi-m = LD [M] $@
|
|
|
|
cmd_link_multi-m = $(cmd_link_multi-y)
|
|
|
|
|
|
|
|
# We would rather have a list of rules like
|
|
|
|
# foo.o: $(foo-objs)
|
|
|
|
# but that's not so easy, so we rather make all composite objects depend
|
|
|
|
# on the set of all their parts
|
|
|
|
$(multi-used-y) : %.o: $(multi-objs-y) FORCE
|
|
|
|
$(call if_changed,link_multi-y)
|
|
|
|
|
|
|
|
$(multi-used-m) : %.o: $(multi-objs-m) FORCE
|
|
|
|
$(call if_changed,link_multi-m)
|
|
|
|
@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
|
|
|
|
|
|
|
|
targets += $(multi-used-y) $(multi-used-m)
|
|
|
|
|
|
|
|
|
|
|
|
# Descending
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
PHONY += $(subdir-ym)
|
|
|
|
$(subdir-ym):
|
|
|
|
$(Q)$(MAKE) $(build)=$@
|
|
|
|
|
|
|
|
# Add FORCE to the prequisites of a target to force it to be always rebuilt.
|
|
|
|
# ---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
PHONY += FORCE
|
|
|
|
|
|
|
|
FORCE:
|
|
|
|
|
|
|
|
# Read all saved command lines and dependencies for the $(targets) we
|
|
|
|
# may be building above, using $(if_changed{,_dep}). As an
|
|
|
|
# optimization, we don't need to read them if the target does not
|
|
|
|
# exist, we will rebuild anyway in that case.
|
|
|
|
|
|
|
|
targets := $(wildcard $(sort $(targets)))
|
|
|
|
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
|
|
|
|
|
|
|
|
ifneq ($(cmd_files),)
|
|
|
|
include $(cmd_files)
|
|
|
|
endif
|
|
|
|
|
|
|
|
# Declare the contents of the .PHONY variable as phony. We keep that
|
|
|
|
# information in a variable se we can use it in if_changed and friends.
|
|
|
|
|
|
|
|
.PHONY: $(PHONY)
|