2015-03-10 08:38:50 +00:00
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/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_SECURE_BOOT_H
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#define __FSL_SECURE_BOOT_H
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secure_boot: split the secure boot functionality in two parts
There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
validating and booting LINUX.
For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.
But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:
If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.
ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).
Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
at run time:
- If bootmode is non-secure, no change
- If bootmode is secure, set the following:
- bootdelay = 0 (Don't give boot prompt)
- bootcmd = Validate and execute the bootscript.
CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.
Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.
Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.
Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-22 11:07:24 +00:00
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#ifdef CONFIG_CHAIN_OF_TRUST
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2015-07-31 08:40:03 +00:00
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#define CONFIG_CMD_ESBC_VALIDATE
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#define CONFIG_FSL_SEC_MON
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2016-03-23 10:54:35 +00:00
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#define CONFIG_SHA_HW_ACCEL
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2015-07-31 08:40:03 +00:00
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#define CONFIG_SHA_PROG_HW_ACCEL
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2016-06-14 17:52:38 +00:00
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#define CONFIG_SPL_BOARD_INIT
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2016-09-13 05:18:23 +00:00
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#ifdef CONFIG_SPL_BUILD
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2016-06-14 17:52:38 +00:00
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/*
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* Define the key hash for U-Boot here if public/private key pair used to
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* sign U-boot are different from the SRK hash put in the fuse
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* Example of defining KEY_HASH is
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* #define CONFIG_SPL_UBOOT_KEY_HASH \
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* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
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* else leave it defined as NULL
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*/
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#define CONFIG_SPL_UBOOT_KEY_HASH NULL
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#endif /* ifdef CONFIG_SPL_BUILD */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_CMD_BLOB
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#define CONFIG_CMD_HASH
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2015-07-31 08:40:03 +00:00
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#define CONFIG_KEY_REVOCATION
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#ifndef CONFIG_SYS_RAMBOOT
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/* The key used for verification of next level images
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* is picked up from an Extension Table which has
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* been verified by the ISBC (Internal Secure boot Code)
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* in boot ROM of the SoC.
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* The feature is only applicable in case of NOR boot and is
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* not applicable in case of RAMBOOT (NAND, SD, SPI).
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2017-02-09 16:06:11 +00:00
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* For LS, this feature is available for all device if IE Table
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* is copied to XIP memory
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* Also, for LS, ISBC doesn't verify this table.
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2015-07-31 08:40:03 +00:00
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*/
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#define CONFIG_FSL_ISBC_KEY_EXT
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2016-03-23 10:54:34 +00:00
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#endif
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2016-04-04 18:41:26 +00:00
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#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
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2016-03-23 10:54:35 +00:00
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/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
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2016-04-04 18:41:26 +00:00
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* Similiarly for LS2080
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2016-03-23 10:54:35 +00:00
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*/
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2016-01-22 11:07:22 +00:00
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#define CONFIG_ESBC_ADDR_64BIT
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#endif
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2016-04-04 18:41:26 +00:00
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#ifdef CONFIG_LS2080A
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2016-03-23 10:54:38 +00:00
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#define CONFIG_EXTRA_ENV \
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"setenv fdt_high 0xa0000000;" \
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"setenv initrd_high 0xcfffffff;" \
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"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
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#else
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2015-03-10 08:38:50 +00:00
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#define CONFIG_EXTRA_ENV \
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2016-06-14 17:52:39 +00:00
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"setenv fdt_high 0xffffffff;" \
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"setenv initrd_high 0xffffffff;" \
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2015-03-10 08:38:50 +00:00
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"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
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2016-03-23 10:54:38 +00:00
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#endif
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2015-03-10 08:38:50 +00:00
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2016-03-23 10:54:37 +00:00
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/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
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* Non-XIP Memory (Nand/SD)*/
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2017-01-06 10:28:56 +00:00
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#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
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2016-06-14 17:52:39 +00:00
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defined(CONFIG_SD_BOOT)
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2016-03-23 10:54:37 +00:00
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#define CONFIG_BOOTSCRIPT_COPY_RAM
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#endif
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2016-06-14 17:52:39 +00:00
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/* The address needs to be modified according to NOR, NAND, SD and
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* DDR memory map
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*/
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2017-01-06 10:28:56 +00:00
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#ifdef CONFIG_FSL_LSCH3
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
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#define CONFIG_BS_ADDR_DEVICE 0x580e00000
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#define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
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#define CONFIG_BS_ADDR_RAM 0xa0e00000
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2016-06-14 17:52:39 +00:00
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#else
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#ifdef CONFIG_SD_BOOT
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/* For SD boot address and size are assigned in terms of sector
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* offset and no. of sectors respectively.
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*/
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2017-02-01 12:58:53 +00:00
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
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#define CONFIG_BS_ADDR_DEVICE 0x00000940
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2016-06-14 17:52:39 +00:00
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#define CONFIG_BS_HDR_SIZE 0x00000010
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#define CONFIG_BS_SIZE 0x00000008
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2016-03-23 10:54:37 +00:00
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#else
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2016-06-14 17:52:39 +00:00
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
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#define CONFIG_BS_ADDR_DEVICE 0x60060000
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#endif /* #ifdef CONFIG_SD_BOOT */
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#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
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#define CONFIG_BS_ADDR_RAM 0x81020000
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2016-03-23 10:54:37 +00:00
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#endif
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#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
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#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
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#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
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2016-03-23 10:54:36 +00:00
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#else
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2016-06-14 17:52:39 +00:00
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#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
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/* BOOTSCRIPT_ADDR is not required */
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2016-03-23 10:54:36 +00:00
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#endif
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2015-03-10 08:38:50 +00:00
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2016-09-01 16:56:44 +00:00
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#ifdef CONFIG_FSL_LS_PPA
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/* Define the key hash here if SRK used for signing PPA image is
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* different from SRK hash put in SFP used for U-Boot.
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* Example
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2017-03-23 08:18:14 +00:00
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* #define PPA_KEY_HASH \
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2016-09-01 16:56:44 +00:00
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* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
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*/
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2017-03-23 08:18:14 +00:00
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#define PPA_KEY_HASH NULL
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2016-09-01 16:56:44 +00:00
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#endif /* ifdef CONFIG_FSL_LS_PPA */
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secure_boot: split the secure boot functionality in two parts
There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
validating and booting LINUX.
For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.
But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:
If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.
ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).
Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
at run time:
- If bootmode is non-secure, no change
- If bootmode is secure, set the following:
- bootdelay = 0 (Don't give boot prompt)
- bootcmd = Validate and execute the bootscript.
CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.
Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.
Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.
Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-22 11:07:24 +00:00
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#include <config_fsl_chain_trust.h>
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2016-06-14 17:52:38 +00:00
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#endif /* #ifndef CONFIG_SPL_BUILD */
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secure_boot: split the secure boot functionality in two parts
There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
validating and booting LINUX.
For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.
But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:
If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.
ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).
Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
at run time:
- If bootmode is non-secure, no change
- If bootmode is secure, set the following:
- bootdelay = 0 (Don't give boot prompt)
- bootcmd = Validate and execute the bootscript.
CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.
Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.
Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.
Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-01-22 11:07:24 +00:00
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#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
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2015-03-10 08:38:50 +00:00
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#endif
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