2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2016-03-31 18:51:36 +00:00
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/*
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* board/renesas/salvator-x/salvator-x.c
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2017-05-13 13:57:53 +00:00
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* This file is Salvator-X/Salvator-XS board support.
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2016-03-31 18:51:36 +00:00
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*
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2017-05-13 13:57:46 +00:00
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* Copyright (C) 2015-2017 Renesas Electronics Corporation
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2016-03-31 18:51:36 +00:00
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* Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*/
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#include <common.h>
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#include <malloc.h>
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#include <netdev.h>
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#include <dm.h>
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#include <dm/platform_data/serial_sh.h>
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#include <asm/processor.h>
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#include <asm/mach-types.h>
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#include <asm/io.h>
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2016-09-21 02:28:55 +00:00
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#include <linux/errno.h>
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2016-03-31 18:51:36 +00:00
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <asm/arch/rcar-mstp.h>
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2017-05-13 13:57:46 +00:00
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#include <asm/arch/sh_sdhi.h>
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2016-03-31 18:51:36 +00:00
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#include <i2c.h>
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#include <mmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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void s_init(void)
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{
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}
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2017-05-13 13:57:48 +00:00
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#define DVFS_MSTP926 BIT(26)
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2017-09-12 17:07:21 +00:00
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#define HSUSB_MSTP704 BIT(4) /* HSUSB */
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2017-05-13 13:57:46 +00:00
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2016-03-31 18:51:36 +00:00
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int board_early_init_f(void)
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{
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2017-05-13 13:57:48 +00:00
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
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/* DVFS for reset */
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2018-09-26 07:00:09 +00:00
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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2017-05-13 13:57:48 +00:00
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#endif
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2016-03-31 18:51:36 +00:00
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return 0;
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}
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2017-09-12 17:07:21 +00:00
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/* HSUSB block registers */
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#define HSUSB_REG_LPSTS 0xE6590102
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#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
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#define HSUSB_REG_UGCTRL2 0xE6590184
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#define HSUSB_REG_UGCTRL2_USB0SEL 0x30
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#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
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2016-03-31 18:51:36 +00:00
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
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2017-05-13 13:57:49 +00:00
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/* USB1 pull-up */
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setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
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2017-09-12 17:07:21 +00:00
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/* Configure the HSUSB block */
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2018-09-26 07:00:09 +00:00
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mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
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2017-09-12 17:07:21 +00:00
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/* Choice USB0SEL */
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clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
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HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
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/* low power status */
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setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
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2017-08-20 15:13:47 +00:00
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return 0;
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2017-05-13 13:57:46 +00:00
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}
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2016-03-31 18:51:36 +00:00
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int dram_init(void)
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{
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2018-07-16 10:26:11 +00:00
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if (fdtdec_setup_mem_size_base() != 0)
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2017-11-27 04:37:53 +00:00
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return -EINVAL;
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2017-05-13 13:57:50 +00:00
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return 0;
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}
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2016-03-31 18:51:36 +00:00
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2017-05-13 13:57:50 +00:00
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int dram_init_banksize(void)
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{
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2017-11-27 04:37:53 +00:00
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fdtdec_setup_memory_banksize();
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2016-03-31 18:51:36 +00:00
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return 0;
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}
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#define RST_BASE 0xE6160000
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#define RST_CA57RESCNT (RST_BASE + 0x40)
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#define RST_CA53RESCNT (RST_BASE + 0x44)
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#define RST_RSTOUTCR (RST_BASE + 0x58)
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#define RST_CODE 0xA5A5000F
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void reset_cpu(ulong addr)
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{
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2017-05-13 13:57:48 +00:00
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
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i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
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#else
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2016-03-31 18:51:36 +00:00
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/* only CA57 ? */
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writel(RST_CODE, RST_CA57RESCNT);
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2017-05-13 13:57:48 +00:00
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#endif
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2016-03-31 18:51:36 +00:00
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}
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2018-10-18 18:30:00 +00:00
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#ifdef CONFIG_MULTI_DTB_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* PRR driver is not available yet */
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u32 cpu_type = rmobile_get_cpu_type();
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if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
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!strcmp(name, "r8a7795-salvator-x-u-boot"))
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return 0;
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if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
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!strcmp(name, "r8a7796-salvator-x-u-boot"))
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return 0;
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if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
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!strcmp(name, "r8a77965-salvator-x-u-boot"))
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return 0;
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return -1;
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}
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#endif
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