mirror of
https://github.com/AsahiLinux/u-boot
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231 lines
5.7 KiB
Text
231 lines
5.7 KiB
Text
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// SPDX-License-Identifier: GPL-2.0
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/*
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* dts file for Xilinx ZynqMP VEK280 revA
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*
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* (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc
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*
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* Michal Simek <michal.simek@amd.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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/dts-v1/;
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/plugin/;
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&{/} {
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compatible = "xlnx,zynqmp-sc-vek280-revA", "xlnx,zynqmp-vek280-revA",
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"xlnx,zynqmp-vek280", "xlnx,zynqmp";
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vc7_xin: vc7-xin {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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};
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};
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&i2c0 {
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#address-cells = <1>;
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#size-cells = <0>;
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tca6416_u233: gpio@20 { /* u233 */
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller; /* interrupt not connected */
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#gpio-cells = <2>;
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gpio-line-names = "", "", "SFP_MOD_ABS", "SFP_TX_DISABLE", /* 0 - 3 */
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"PMBUS2_INA226_ALERT", "", "", "", /* 4 - 7 */
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"FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */
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"VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */
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};
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i2c-mux@74 { /* u33 */
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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/* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
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pmbus_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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/* On connector J325 */
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ir35215_46: pmic@46 { /* IR35215 - u152 */
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compatible = "infineon,ir35215";
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reg = <0x46>; /* i2c addr - 0x16 */
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};
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irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */
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compatible = "infineon,irps5401";
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reg = <0x47>; /* i2c addr 0x17 */
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};
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irps5401_48: pmic@48 { /* IRPS5401 - u279 */
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compatible = "infineon,irps5401";
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reg = <0x48>; /* i2c addr 0x18 */
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};
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ir38064_49: regulator@49 { /* IR38064 - u295 */
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compatible = "infineon,ir38064";
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reg = <0x49>; /* i2c addr 0x19 */
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};
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irps5401_4c: pmic@4c { /* IRPS5401 - u167 */
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compatible = "infineon,irps5401";
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reg = <0x4c>; /* i2c addr 0x1c */
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};
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irps5401_4d: pmic@4d { /* IRPS5401 - u175 */
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compatible = "infineon,irps5401";
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reg = <0x4d>; /* i2c addr 0x1d */
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};
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ir38060_4e: regulator@4e { /* IR38060 - u282 */
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compatible = "infineon,ir38060";
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reg = <0x4e>; /* i2c addr 0x1e */
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};
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};
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pmbus1_ina226_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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/* alerts coming to u233 and SC */
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vccint: ina226@40 { /* u65 */
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compatible = "ti,ina226";
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reg = <0x40>;
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shunt-resistor = <500>; /* r440 */
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};
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vcc_soc: ina226@41 { /* u161 */
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compatible = "ti,ina226";
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reg = <0x41>;
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shunt-resistor = <500>; /* r1702 */
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};
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vcc_pmc: ina226@42 { /* u163 */
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compatible = "ti,ina226";
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reg = <0x42>;
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shunt-resistor = <5000>; /* r382 */
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};
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vcc_ram: ina226@43 { /* u355 */
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compatible = "ti,ina226";
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reg = <0x43>;
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shunt-resistor = <5000>; /* r2417 */
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};
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vcc_pslp: ina226@44 { /* u165 */
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compatible = "ti,ina226";
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reg = <0x44>;
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shunt-resistor = <5000>; /* r1830 */
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};
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vcc_psfp: ina226@45 { /* u260 */
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compatible = "ti,ina226";
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reg = <0x45>;
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shunt-resistor = <5000>; /* r2386 */
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};
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vcco_hdio: ina226@46 { /* u356 */
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compatible = "ti,ina226";
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reg = <0x46>;
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shunt-resistor = <5000>; /* r2392 */
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};
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};
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i2c@2 { /* NC */ /* FIXME maybe remove */
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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};
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pmbus2_ina226_i2c: i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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/* alerts coming to u233 and SC */
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vccaux: ina226@40 { /* u166 */
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compatible = "ti,ina226";
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reg = <0x40>;
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shunt-resistor = <5000>; /* r2384 */
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};
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vccaux_pmc: ina226@41 { /* u168 */
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compatible = "ti,ina226";
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reg = <0x41>;
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shunt-resistor = <5000>; /* r2000 */
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};
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mgtavcc: ina226@42 { /* u265 */
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compatible = "ti,ina226";
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reg = <0x42>;
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shunt-resistor = <5000>; /* r1829 */
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};
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vcc1v5: ina226@43 { /* u264 */
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compatible = "ti,ina226";
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reg = <0x43>;
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shunt-resistor = <5000>; /* r2397 */
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};
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vcco_mio: ina226@45 { /* u172 */
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compatible = "ti,ina226";
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reg = <0x45>;
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shunt-resistor = <5000>; /* r2401 */
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};
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mgtavtt: ina226@46 { /* u188 */
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compatible = "ti,ina226";
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reg = <0x46>;
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shunt-resistor = <500>; /* r1384 */
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};
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vcco_502: ina226@47 { /* u174 */
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compatible = "ti,ina226";
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reg = <0x47>;
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shunt-resistor = <5000>; /* r1994 */
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};
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mgtvccaux: ina226@48 { /* u176 */
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compatible = "ti,ina226";
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reg = <0x48>;
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shunt-resistor = <5000>; /* r2384 */
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};
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vcc1v1_lp4: ina226@49 { /* u306 */
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compatible = "ti,ina226";
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reg = <0x49>;
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shunt-resistor = <500>; /* r2064 */
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};
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vadj_fmc: ina226@4a { /* u281 */
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compatible = "ti,ina226";
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reg = <0x4a>;
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shunt-resistor = <5000>; /* r2031 */
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};
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lpdmgtyavcc: ina226@4b { /* u177 */
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compatible = "ti,ina226";
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reg = <0x4b>;
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shunt-resistor = <5000>; /* r2004 */
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};
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lpdmgtyavtt: ina226@4c { /* u309 */
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compatible = "ti,ina226";
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reg = <0x4c>;
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shunt-resistor = <5000>; /* r1229 */
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};
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lpdmgtyvccaux: ina226@4d { /* u234 */
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compatible = "ti,ina226";
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reg = <0x4d>;
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shunt-resistor = <5000>; /* r1679 */
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};
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};
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i2c@4 { /* NC */ /* FIXME maybe remove */
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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};
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rc21008a_gtclk1: i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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/* connector j374 */
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/* rc21008a at 0x9 u299 */
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vc7: clock-generator@9 {
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compatible = "renesas,rc21008a";
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reg = <0x9>;
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#clock-cells = <1>;
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clocks = <&vc7_xin>;
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clock-names = "xin";
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};
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};
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fmcp1_iic: i2c@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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/* to j51c */
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};
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sfp: i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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/* sfp+ connector J376 */
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};
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};
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};
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