2012-10-04 06:46:02 +00:00
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/*
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* Copyright (C) 2012 Altera Corporation <www.altera.com>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2012-10-04 06:46:02 +00:00
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/u-boot.h>
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#include <asm/utils.h>
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#include <version.h>
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#include <image.h>
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#include <asm/arch/reset_manager.h>
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#include <spl.h>
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2013-09-11 16:24:48 +00:00
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#include <asm/arch/system_manager.h>
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2013-12-02 18:01:39 +00:00
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#include <asm/arch/freeze_controller.h>
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2012-10-04 06:46:02 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_RAM;
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}
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/*
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* Board initialization after bss clearance
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*/
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void spl_board_init(void)
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{
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2013-09-11 16:24:48 +00:00
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#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
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2013-12-02 18:01:39 +00:00
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debug("Freezing all I/O banks\n");
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/* freeze all IO banks */
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sys_mgr_frzctrl_freeze_req();
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2013-09-11 16:24:48 +00:00
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/* configure the pin muxing through system manager */
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sysmgr_pinmux_init();
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#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
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2012-10-04 06:46:02 +00:00
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/* de-assert reset for peripherals and bridges based on handoff */
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reset_deassert_peripherals_handoff();
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2013-12-02 18:01:39 +00:00
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debug("Unfreezing/Thaw all I/O banks\n");
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/* unfreeze / thaw all IO banks */
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sys_mgr_frzctrl_thaw_req();
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2012-10-04 06:46:02 +00:00
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/* enable console uart printing */
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preloader_console_init();
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}
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