2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2011-12-20 05:46:34 +00:00
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/*
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* Freescale MX28EVK board
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*
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* (C) Copyright 2011 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* Based on m28evk.c:
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*/
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#include <common.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2020-05-10 17:39:56 +00:00
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#include <net.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2011-12-20 05:46:34 +00:00
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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2020-05-10 17:40:11 +00:00
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#include <linux/delay.h>
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2011-12-20 05:46:34 +00:00
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#include <linux/mii.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Functions
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*/
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int board_early_init_f(void)
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{
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/* IO0 clock at 480MHz */
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2013-01-11 03:19:03 +00:00
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mxs_set_ioclk(MXC_IOCLK0, 480000);
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2011-12-20 05:46:34 +00:00
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/* IO1 clock at 480MHz */
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2013-01-11 03:19:03 +00:00
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mxs_set_ioclk(MXC_IOCLK1, 480000);
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2011-12-20 05:46:34 +00:00
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/* SSP0 clock at 96MHz */
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2013-01-11 03:19:03 +00:00
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mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
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2012-08-27 23:56:40 +00:00
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/* SSP2 clock at 160MHz */
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2013-01-11 03:19:03 +00:00
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mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
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2011-12-20 05:46:34 +00:00
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2012-01-18 01:33:08 +00:00
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#ifdef CONFIG_CMD_USB
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mxs_iomux_setup_pad(MX28_PAD_SSP2_SS1__USB1_OVERCURRENT);
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mxs_iomux_setup_pad(MX28_PAD_AUART2_RX__GPIO_3_8 |
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MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
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gpio_direction_output(MX28_PAD_AUART2_RX__GPIO_3_8, 1);
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#endif
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2013-05-10 09:14:09 +00:00
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/* Power on LCD */
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gpio_direction_output(MX28_PAD_LCD_RESET__GPIO_3_30, 1);
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/* Set contrast to maximum */
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gpio_direction_output(MX28_PAD_PWM2__GPIO_3_18, 1);
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2011-12-20 05:46:34 +00:00
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return 0;
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}
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int dram_init(void)
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{
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2012-08-19 04:58:30 +00:00
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return mxs_dram_init();
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2011-12-20 05:46:34 +00:00
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}
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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