u-boot/arch/x86/include/asm/arch-quark/iomap.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>
 */

#ifndef _QUARK_IOMAP_H_
#define _QUARK_IOMAP_H_

/* Memory Mapped IO bases */

/* ESRAM */
#define ESRAM_BASE_ADDRESS		CONFIG_ESRAM_BASE
#define ESRAM_BASE_SIZE			ESRAM_SIZE

/* PCI Configuration Space */
#define MCFG_BASE_ADDRESS		CONFIG_PCIE_ECAM_BASE
#define MCFG_BASE_SIZE			0x10000000

/* High Performance Event Timer */
#define HPET_BASE_ADDRESS		0xfed00000
#define HPET_BASE_SIZE			0x400

/* Root Complex Base Address */
#define RCBA_BASE_ADDRESS		CONFIG_RCBA_BASE
#define RCBA_BASE_SIZE			0x4000

/* IO Port bases */
#define ACPI_PM1_BASE_ADDRESS		CONFIG_ACPI_PM1_BASE
#define ACPI_PM1_BASE_SIZE		0x10

#define ACPI_PBLK_BASE_ADDRESS		CONFIG_ACPI_PBLK_BASE
#define ACPI_PBLK_BASE_SIZE		0x10

#define SPI_DMA_BASE_ADDRESS		CONFIG_SPI_DMA_BASE
#define SPI_DMA_BASE_SIZE		0x10

#define GPIO_BASE_ADDRESS		CONFIG_GPIO_BASE
#define GPIO_BASE_SIZE			0x80

#define ACPI_GPE0_BASE_ADDRESS		CONFIG_ACPI_GPE0_BASE
#define ACPI_GPE0_BASE_SIZE		0x40

#define WDT_BASE_ADDRESS		CONFIG_WDT_BASE
#define WDT_BASE_SIZE			0x40

#endif /* _QUARK_IOMAP_H_ */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
x86: quark: Add platform ASL files This adds basic quark platform ASL files. They are intended to be included in dsdt.asl of any board that is based on this platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2016-05-26 02:19:10 +00:00			`/*`
			`* Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com>`
			`*/`

			`#ifndef _QUARK_IOMAP_H_`
			`#define _QUARK_IOMAP_H_`

			`/* Memory Mapped IO bases */`

			`/* ESRAM */`
			`#define ESRAM_BASE_ADDRESS CONFIG_ESRAM_BASE`
			`#define ESRAM_BASE_SIZE ESRAM_SIZE`

			`/* PCI Configuration Space */`
			`#define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE`
			`#define MCFG_BASE_SIZE 0x10000000`

			`/* High Performance Event Timer */`
			`#define HPET_BASE_ADDRESS 0xfed00000`
			`#define HPET_BASE_SIZE 0x400`

			`/* Root Complex Base Address */`
			`#define RCBA_BASE_ADDRESS CONFIG_RCBA_BASE`
			`#define RCBA_BASE_SIZE 0x4000`

			`/* IO Port bases */`
			`#define ACPI_PM1_BASE_ADDRESS CONFIG_ACPI_PM1_BASE`
			`#define ACPI_PM1_BASE_SIZE 0x10`

			`#define ACPI_PBLK_BASE_ADDRESS CONFIG_ACPI_PBLK_BASE`
			`#define ACPI_PBLK_BASE_SIZE 0x10`

			`#define SPI_DMA_BASE_ADDRESS CONFIG_SPI_DMA_BASE`
			`#define SPI_DMA_BASE_SIZE 0x10`

			`#define GPIO_BASE_ADDRESS CONFIG_GPIO_BASE`
			`#define GPIO_BASE_SIZE 0x80`

			`#define ACPI_GPE0_BASE_ADDRESS CONFIG_ACPI_GPE0_BASE`
			`#define ACPI_GPE0_BASE_SIZE 0x40`

			`#define WDT_BASE_ADDRESS CONFIG_WDT_BASE`
			`#define WDT_BASE_SIZE 0x40`

			`#endif /* _QUARK_IOMAP_H_ */`