2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2016-05-06 14:40:22 +00:00
|
|
|
/*
|
2019-08-29 09:53:06 +00:00
|
|
|
* QEMU x86 specific E820 table generation
|
|
|
|
*
|
2016-05-06 14:40:22 +00:00
|
|
|
* (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
|
2019-08-29 09:53:06 +00:00
|
|
|
* (C) Copyright 2019 Bin Meng <bmeng.cn@gmail.com>
|
2016-05-06 14:40:22 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
2019-08-02 15:44:25 +00:00
|
|
|
#include <env_internal.h>
|
2020-02-03 14:36:16 +00:00
|
|
|
#include <malloc.h>
|
2016-05-06 14:40:22 +00:00
|
|
|
#include <asm/e820.h>
|
2019-08-29 09:53:06 +00:00
|
|
|
#include <asm/arch/qemu.h>
|
2016-05-06 14:40:22 +00:00
|
|
|
|
2017-01-18 11:32:51 +00:00
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
|
2018-04-12 05:02:10 +00:00
|
|
|
unsigned int install_e820_map(unsigned int max_entries,
|
2018-04-12 05:02:11 +00:00
|
|
|
struct e820_entry *entries)
|
2016-05-06 14:40:22 +00:00
|
|
|
{
|
2019-08-29 09:53:06 +00:00
|
|
|
u64 high_mem_size;
|
|
|
|
int n = 0;
|
2016-05-06 14:40:22 +00:00
|
|
|
|
2019-08-29 09:53:06 +00:00
|
|
|
entries[n].addr = 0;
|
|
|
|
entries[n].size = ISA_START_ADDRESS;
|
|
|
|
entries[n].type = E820_RAM;
|
|
|
|
n++;
|
|
|
|
|
|
|
|
entries[n].addr = ISA_START_ADDRESS;
|
|
|
|
entries[n].size = ISA_END_ADDRESS - ISA_START_ADDRESS;
|
|
|
|
entries[n].type = E820_RESERVED;
|
|
|
|
n++;
|
2016-05-06 14:40:22 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* since we use memalign(malloc) to allocate high memory for
|
|
|
|
* storing ACPI tables, we need to reserve them in e820 tables,
|
|
|
|
* otherwise kernel will reclaim them and data will be corrupted
|
|
|
|
*/
|
2019-08-29 09:53:06 +00:00
|
|
|
entries[n].addr = ISA_END_ADDRESS;
|
|
|
|
entries[n].size = gd->relocaddr - TOTAL_MALLOC_LEN - ISA_END_ADDRESS;
|
|
|
|
entries[n].type = E820_RAM;
|
|
|
|
n++;
|
2016-05-06 14:40:22 +00:00
|
|
|
|
|
|
|
/* for simplicity, reserve entire malloc space */
|
2019-08-29 09:53:06 +00:00
|
|
|
entries[n].addr = gd->relocaddr - TOTAL_MALLOC_LEN;
|
|
|
|
entries[n].size = TOTAL_MALLOC_LEN;
|
|
|
|
entries[n].type = E820_RESERVED;
|
|
|
|
n++;
|
|
|
|
|
|
|
|
entries[n].addr = gd->relocaddr;
|
|
|
|
entries[n].size = qemu_get_low_memory_size() - gd->relocaddr;
|
|
|
|
entries[n].type = E820_RESERVED;
|
|
|
|
n++;
|
2016-05-06 14:40:22 +00:00
|
|
|
|
2019-08-29 09:53:06 +00:00
|
|
|
entries[n].addr = CONFIG_PCIE_ECAM_BASE;
|
|
|
|
entries[n].size = CONFIG_PCIE_ECAM_SIZE;
|
|
|
|
entries[n].type = E820_RESERVED;
|
|
|
|
n++;
|
2016-05-06 14:40:22 +00:00
|
|
|
|
2019-08-29 09:53:06 +00:00
|
|
|
high_mem_size = qemu_get_high_memory_size();
|
|
|
|
if (high_mem_size) {
|
|
|
|
entries[n].addr = SZ_4G;
|
|
|
|
entries[n].size = high_mem_size;
|
|
|
|
entries[n].type = E820_RAM;
|
|
|
|
n++;
|
|
|
|
}
|
2016-05-06 14:40:22 +00:00
|
|
|
|
2019-08-29 09:53:06 +00:00
|
|
|
return n;
|
2016-05-06 14:40:22 +00:00
|
|
|
}
|