2015-02-17 12:42:46 +00:00
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/*
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* Copyright (C) 2014 O.S. Systems Software LTDA.
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* Copyright (C) 2014 Kynetics LLC.
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* Copyright (C) 2014 Revolution Robotics, Inc.
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*
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* Author: Otavio Salvador <otavio@ossystems.com.br>
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*
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* Configuration settings for the WaRP Board
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "mx6_common.h"
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/* Size of malloc() pool */
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2015-03-02 13:17:17 +00:00
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#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */
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2015-02-17 12:42:46 +00:00
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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/* MMC Configs */
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2015-05-27 04:11:45 +00:00
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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2015-02-17 12:42:46 +00:00
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#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT
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2015-03-12 01:52:15 +00:00
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#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
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2015-05-27 04:11:46 +00:00
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#define CONFIG_SUPPORT_EMMC_BOOT
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2015-02-17 12:42:46 +00:00
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/* Watchdog */
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#define CONFIG_HW_WATCHDOG
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#define CONFIG_IMX_WATCHDOG
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#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M)
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#define CONFIG_STACKSIZE SZ_128K
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_512M
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_ENV_OFFSET (6 * SZ_64K)
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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/* VDD voltage 1.65 - 1.95 */
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#define CONFIG_SYS_SD_VOLTAGE 0x00000080
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2015-02-28 18:16:42 +00:00
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/* USB Configs */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG2 port enabled */
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#endif
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#define CONFIG_CI_UDC
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#define CONFIG_USBD_HS
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_CMD_USB_MASS_STORAGE
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2015-06-12 17:56:58 +00:00
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_USB_GADGET_DOWNLOAD
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2015-02-28 18:16:42 +00:00
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#define CONFIG_USB_GADGET_VBUS_DRAW 2
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#define CONFIG_G_DNL_VENDOR_NUM 0x0525
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#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
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#define CONFIG_G_DNL_MANUFACTURER "FSL"
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2015-03-02 13:17:17 +00:00
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#define CONFIG_CMD_DFU
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2015-06-12 17:56:58 +00:00
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#define CONFIG_USB_FUNCTION_DFU
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2015-03-02 13:17:17 +00:00
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#define CONFIG_DFU_MMC
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2015-05-27 04:11:44 +00:00
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#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
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2015-03-02 13:17:17 +00:00
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#define DFU_DEFAULT_POLL_TIMEOUT 300
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2015-07-21 22:48:41 +00:00
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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2015-09-21 20:43:38 +00:00
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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2015-07-21 22:48:41 +00:00
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_MAX77696
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2015-05-27 04:11:47 +00:00
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2015-02-17 12:42:46 +00:00
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx6sl-warp.dtb\0" \
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"fdt_addr=0x88000000\0" \
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"initrd_addr=0x83800000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev=0\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
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2015-03-02 13:17:17 +00:00
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"dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
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2015-02-17 12:42:46 +00:00
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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#endif /* __CONFIG_H */
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