Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-07 05:34:28 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/drivers/pinctrl/intel/Kconfig

27 lines
511 B
Text
Raw Normal View History

x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:42:53 +00:00
#
# Intel PINCTRL drivers
#
if PINCTRL_INTEL
config INTEL_PINCTRL_DUAL_ROUTE_SUPPORT
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-09 00:32:08 +00:00
bool
default y
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:42:53 +00:00
config INTEL_PINCTRL_PADCFG_PADTOL
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-09 00:32:08 +00:00
bool n
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:42:53 +00:00
config INTEL_PINCTRL_IOSTANDBY
x86: apl: Add pinctrl driver Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-09 00:32:08 +00:00
bool
default y
config PINCTRL_INTEL_APL
bool "Support Intel Apollo Lake (APL)"
help
Add support for Intel Apollo Lake pin-control and pin-mux settings.
These are mostly read from the device tree, with the early-pads
property in the host bridge and the pads property in the fsp-s
subnode of the host bridge.
x86: Add a generic Intel pinctrl driver Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-07 04:42:53 +00:00
endif
Reference in a new issue Copy permalink