mirror of
https://github.com/AsahiLinux/u-boot
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135 lines
6.6 KiB
ReStructuredText
135 lines
6.6 KiB
ReStructuredText
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.. SPDX-License-Identifier: GPL-2.0+
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Amlogic SoC Boot Flow
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=====================
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The Amlogic SoCs have a pre-defined boot sequence in the SoC ROM code. Here are
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the possible boot sources of different SoC families supported by U-Boot:
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GX* & AXG family
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----------------
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+----------+--------------------+-------+-------+---------------+---------------+
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| | 1 | 2 | 3 | 4 | 5 |
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+==========+====================+=======+=======+===============+===============+
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| S905 | POC=0: SPI NOR | eMMC | NAND | SD Card | USB Device |
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| S905X | | | | | |
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| S905L | | | | | |
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| S905W | | | | | |
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| S912 | | | | | |
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+----------+--------------------+-------+-------+---------------+---------------+
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| S805X | POC=0: SPI NOR | eMMC | NAND | USB Device | - |
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| A113D | | | | | |
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| A113X | | | | | |
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+----------+--------------------+-------+-------+---------------+---------------+
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POC pin: `NAND_CLE`
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Some boards provide a button to force USB BOOT which disables the eMMC clock signal
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to bypass the eMMC stage. Others have removable eMMC modules; removing the eMMC and
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SDCard will allow boot from USB.
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An exception is the lafrite board (aml-s805x-xx) which has no SDCard slot and boots
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from SPI. The only ways to boot the lafrite board from USB are:
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- Erase the first sectors of SPI NOR flash
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- Insert an HDMI boot plug forcing boot over USB
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The VIM1 and initial VIM2 boards provide a test point on the eMMC signals to block
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the storage from answering and continue to the next boot step.
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The USB Device boot uses the first USB interface. On some boards this port is only
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available on an USB-A type connector and needs an special Type-A to Type-A cable to
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communicate with the BootROM.
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G12* & SM1 family
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-----------------
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| POC0 | POC1 | POC2 | 1 | 2 | 3 | 4 |
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+=======+=======+=======+===============+===============+===============+===============+
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| 0 | 0 | 0 | USB Device | SPI NOR | NAND/eMMC | SDCard |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 0 | 0 | 1 | USB Device | NAND/eMMC | SDCard | - |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 0 | 1 | 0 | SPI NOR | NAND/eMMC | SDCard | USB Device |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 0 | 1 | 1 | SPI NAND | NAND/eMMC | USB Device | - |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 1 | 0 | 0 | USB Device | SPI NOR | NAND/eMMC | SDCard |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 1 | 0 | 1 | USB Device | NAND/eMMC | SDCard | - |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 1 | 1 | 0 | SPI NOR | NAND/eMMC | SDCard | USB Device |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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| 1 | 1 | 1 | NAND/eMMC | SDCard | USB Device | - |
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+-------+-------+-------+---------------+---------------+---------------+---------------+
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The last option (1/1/1) is the normal default seen on production devices.
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* POC0 pin: `BOOT_4` (0 and all other 1 means SPI NAND boot first)
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* POC1 pin: `BOOT_5` (0 and all other 1 means USB Device boot first
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* POC2 pin: `BOOT_6` (0 and all other 1 means SPI NOR boot first)
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Most boards provide a button to force USB BOOT which lowers `BOOT_5` to 0. Some boards
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provide a test point on the eMMC or SPI NOR clock signals to block the storage from
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answering and continue to the next boot step.
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The Khadas VIM3/3L boards embed a microcontroller which sets POC signals according
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to its configuration or a specific key press sequence to either boot from SPI NOR
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or eMMC then SDCard, or boot as an USB Device.
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The Odroid N2/N2+ has a hardware switch to select between SPI NOR or eMMC boot.
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Boot Modes
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----------
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* SDCard
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The BootROM fetches the first SDCard sectors in one sequence, then checks the content
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of the data. The BootROM expects to find the FIP binary in sector 1, 512 bytes offset
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from the start.
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* eMMC
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The BootROM fetches the first sectors in one sequence, first on the main partition,
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and then on the Boot0 followed by Boot1 HW partitions. After each read, the BootROM
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checks the data and looks to the next partition if it fails. The BootROM expects to
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find the FIP binary in sector 1, 512 bytes offset from the start.
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* SPI NOR
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The BootROM fetches the first SPI NOR sectors in one sequence, then checks the content
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of the data. The BootROM expects to find the FIP binary in sector 1, 512 bytes offset
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from the start.
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* NAND & SPI NAND
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These modes are rarely used in open platforms and no details are available.
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* USB Device
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The BootROM sets the USB Gadget interface to serve a custom USB protocol with the
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USB ID 1b8e:c003. The Amlogic `update` utility is designed to use this protocol. It
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is also implemented in the Amlogic Vendor U-Boot.
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The open-source `pyamlboot` utility https://github.com/superna9999/pyamlboot also
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implements this protocol and can load U-Boot in memory in order to start the SoC
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without any attached storage or to recover from a failed/incorrect image flash.
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HDMI Recovery
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-------------
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The BootROM also briefly reads 8 bytes at address I2C 0x52 offset 0xf8 (248) on the
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HDMI DDC bus. If the content is `boot@USB` it will force USB boot mode. If the content
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is `boot@SDC` it will force SDCard boot mode.
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If USB Device doesn't enumerate or SD Card boot step doesn't work, the BootROM will
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continue with the normal boot sequence.
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Special boot dongles can be built by connecting a 256bytes EEPROM set to answer on
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address 0x52, and program `boot@USB` or `boot@SDC` at offset 0xf8 (248).
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Note: If the SoC is booted with USB Device forced at first step, it will keep the boot
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order on warm reboot. Only cold reboot (power removed) will reset the boot order.
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