2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2010-01-25 10:27:44 +00:00
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/*
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* Configuration settings for the Sentec Cobra Board.
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*
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* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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*/
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/*
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* configuration for ASTRO "Urmel" board.
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* Originating from Cobra5272 configuration, messed up by
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* Wolfgang Wegner <w.wegner@astro-kom.de>
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* Please do not bother the original author with bug reports
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* concerning this file.
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*/
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#ifndef _CONFIG_ASTRO_MCF5373L_H
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#define _CONFIG_ASTRO_MCF5373L_H
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2012-09-23 15:41:25 +00:00
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#include <linux/stringify.h>
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2010-01-25 10:27:44 +00:00
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/*
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* set the card type to actually compile for; either of
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* the possibilities listed below has to be used!
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*/
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2021-08-19 19:16:15 +00:00
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#define ASTRO_V532 1
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2010-01-25 10:27:44 +00:00
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2021-08-19 19:16:15 +00:00
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#if ASTRO_V532
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2010-01-25 10:27:44 +00:00
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#define ASTRO_ID 0xF8
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2021-08-19 19:16:15 +00:00
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#elif ASTRO_V512
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2010-01-25 10:27:44 +00:00
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#define ASTRO_ID 0xFA
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2021-08-19 19:16:15 +00:00
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#elif ASTRO_TWIN7S2
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2010-01-25 10:27:44 +00:00
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#define ASTRO_ID 0xF9
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2021-08-19 19:16:15 +00:00
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#elif ASTRO_V912
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2010-01-25 10:27:44 +00:00
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#define ASTRO_ID 0xFC
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2021-08-19 19:16:15 +00:00
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#elif ASTRO_COFDMDUOS2
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2010-01-25 10:27:44 +00:00
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#define ASTRO_ID 0xFB
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#else
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#error No card type defined!
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#endif
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/* I2C */
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/*
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* Defines processor clock - important for correct timings concerning serial
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* interface etc.
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*/
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_CLK 80000000
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#define CFG_SYS_CPU_CLK (CFG_SYS_CLK * 3)
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2022-11-16 18:10:37 +00:00
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#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
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2010-01-25 10:27:44 +00:00
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/*
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* Define baudrate for UART1 (console output, tftp, ...)
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* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
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2022-11-16 18:10:41 +00:00
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* CFG_SYS_BAUDRATE_TABLE defines values that can be selected
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2010-01-25 10:27:44 +00:00
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* in u-boot command interface
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*/
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_UART_PORT (2)
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#define CFG_SYS_UART2_ALT3_GPIO
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2010-01-25 10:27:44 +00:00
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/* here we put our FPGA configuration... */
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/* Define user parameters that have to be customized most likely */
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/* AUTOBOOT settings - booting images automatically by u-boot after power on */
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/*
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* The following settings will be contained in the environment block ; if you
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* want to use a neutral environment all those settings can be manually set in
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* u-boot: 'set' command
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*/
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2022-12-04 15:03:50 +00:00
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#define CFG_EXTRA_ENV_SETTINGS \
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2010-01-25 10:27:44 +00:00
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"loaderversion=11\0" \
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2012-09-23 15:41:25 +00:00
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"card_id="__stringify(ASTRO_ID)"\0" \
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2010-01-25 10:27:44 +00:00
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"alterafile=0\0" \
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"xilinxfile=0\0" \
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"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
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"fpga load 0 0x41000000 $filesize\0" \
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"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
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"fpga load 1 0x41000000 $filesize\0" \
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"env_default=1\0" \
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"env_check=if test $env_default -eq 1;"\
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" then setenv env_default 0;saveenv;fi\0"
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/*
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* "update" is a non-standard command that has to be supplied
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* by external update.c; This is not included in mainline because
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* it needs non-blocking CFI routines.
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*/
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_FPGA_WAIT 1000
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/* End of user parameters to be customized */
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/* Defines memory range for test */
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/*
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* Low Level Configuration Settings
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* (address mappings, register initial values, etc.)
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* You should know what you are doing if you make changes here.
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*/
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/* Base register address */
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
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2010-01-25 10:27:44 +00:00
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/* System Conf. Reg. & System Protection Reg. */
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_SCR 0x0003;
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#define CFG_SYS_SPR 0xffff;
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2010-01-25 10:27:44 +00:00
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/*
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* Definitions for initial stack pointer and data area (in internal SRAM)
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*/
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_INIT_RAM_ADDR 0x80000000
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#define CFG_SYS_INIT_RAM_SIZE 0x8000
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#define CFG_SYS_INIT_RAM_CTRL 0x221
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2010-01-25 10:27:44 +00:00
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/*
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
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*/
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2022-11-16 18:10:37 +00:00
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#define CFG_SYS_SDRAM_BASE 0x40000000
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2010-01-25 10:27:44 +00:00
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/*
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* Chipselect bank definitions
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*
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* CS0 - Flash 32MB (first 16MB)
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* CS1 - Flash 32MB (second half)
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* CS2 - FPGA
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* CS3 - FPGA
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* CS4 - unused
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* CS5 - unused
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*/
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_CS0_BASE 0
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#define CFG_SYS_CS0_MASK 0x00ff0001
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#define CFG_SYS_CS0_CTRL 0x00001fc0
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2010-01-25 10:27:44 +00:00
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_CS1_BASE 0x01000000
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#define CFG_SYS_CS1_MASK 0x00ff0001
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#define CFG_SYS_CS1_CTRL 0x00001fc0
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2010-01-25 10:27:44 +00:00
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_CS2_BASE 0x20000000
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#define CFG_SYS_CS2_MASK 0x00ff0001
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#define CFG_SYS_CS2_CTRL 0x0000fec0
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2010-01-25 10:27:44 +00:00
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_CS3_BASE 0x21000000
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#define CFG_SYS_CS3_MASK 0x00ff0001
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#define CFG_SYS_CS3_CTRL 0x0000fec0
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2010-01-25 10:27:44 +00:00
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_FLASH_BASE 0x00000000
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2010-01-25 10:27:44 +00:00
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/* Reserve 256 kB for Monitor */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization ??
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*/
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \
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(CFG_SYS_SDRAM_SIZE << 20))
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2010-01-25 10:27:44 +00:00
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/* FLASH organization */
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_FLASH_SIZE 0x2000000
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2010-01-25 10:27:44 +00:00
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2015-03-29 20:54:16 +00:00
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#define LDS_BOARD_TEXT \
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. = DEFINED(env_offset) ? env_offset : .; \
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2017-08-03 18:21:49 +00:00
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env/embedded.o(.text*)
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2015-03-29 20:54:16 +00:00
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2010-01-25 10:27:44 +00:00
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/* Cache Configuration */
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2022-11-16 18:10:41 +00:00
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#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
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CFG_SYS_INIT_RAM_SIZE - 8)
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#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
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CFG_SYS_INIT_RAM_SIZE - 4)
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#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA)
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#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
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CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
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2010-03-12 04:12:53 +00:00
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CF_ACR_EN | CF_ACR_SM_ALL)
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2022-11-16 18:10:41 +00:00
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#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
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2010-03-12 04:12:53 +00:00
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CF_CACR_DCM_P)
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2023-02-25 22:25:26 +00:00
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2010-01-25 10:27:44 +00:00
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#endif /* _CONFIG_ASTRO_MCF5373L_H */
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