u-boot/arch/arm/include/asm/arch-ls102xa/clock.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2014 Freescale Semiconductor, Inc.
 *
 */

#ifndef __ASM_ARCH_LS102XA_CLOCK_H_
#define __ASM_ARCH_LS102XA_CLOCK_H_

enum mxc_clock {
	MXC_ARM_CLK = 0,
	MXC_UART_CLK,
	MXC_I2C_CLK,
	MXC_DSPI_CLK,
};

unsigned int mxc_get_clock(enum mxc_clock clk);
ulong get_ddr_freq(ulong);
uint get_svr(void);

#endif /* __ASM_ARCH_LS102XA_CLOCK_H_ */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
arm: ls102xa: Add Freescale LS102xA SoC support The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> 2014-09-05 05:52:34 +00:00			`/*`
			`* Copyright 2014 Freescale Semiconductor, Inc.`
			`*`
			`*/`

			`#ifndef __ASM_ARCH_LS102XA_CLOCK_H_`
			`#define __ASM_ARCH_LS102XA_CLOCK_H_`

			`enum mxc_clock {`
			`MXC_ARM_CLK = 0,`
			`MXC_UART_CLK,`
			`MXC_I2C_CLK,`
			`MXC_DSPI_CLK,`
			`};`

			`unsigned int mxc_get_clock(enum mxc_clock clk);`
common: arm: freescale: layerscape: Move header files out of common.h We should not have an arch-specific header file in common.h. Adjust the board files a little so it is not needed, and drop it. Signed-off-by: Simon Glass <sjg@chromium.org> 2017-05-17 14:23:10 +00:00			`ulong get_ddr_freq(ulong);`
common: freescale: Move arch-specific declarations The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com> 2017-05-17 14:23:06 +00:00			`uint get_svr(void);`
arm: ls102xa: Add Freescale LS102xA SoC support The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> 2014-09-05 05:52:34 +00:00
			`#endif /* __ASM_ARCH_LS102XA_CLOCK_H_ */`