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u-boot/board/tq/tqma6/tqma6q.cfg

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
Add TQ Systems TQMa6 board support This patch adds the changes to boards.cfg and the board directory under board/tqc. TQMa6 is a family of modules based on Freescale i.MX6. It consists of TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3 TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3 The modules need a baseboard. Initially the MBa6x starterkit mainboard is supported. To easy support for other mainboards the functionality is splitted in one file for the module (tqma6.c) and one file for the baseboard (tqma6_ mba6). The modules can be boot from eMMC (on USDHC3) and SPI flash. The following features are supported: - MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard) - Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module. The phy needs special configurations for the pad skew registers to adjust for the signal routing. Also support for standard ethernet commands and uppdate via tftp. - SPI: ECSPI1 with bootable serial flash on module and two additional chip selects on MBa6x - I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3) and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x are also configured. - USB: high speed host 1 on MBa6x and support for USB storage - PMIC: support for pfuze 100 on TQMa6<x> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-07-18 14:52:44 +00:00
/*
* Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
*
doc: update reference to README.imximage Update reference in many files detected by scripts/documentation-file-ref-check README.imximage => imx/mkimage/imximage.txt Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-02-28 14:18:12 +00:00
* Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
Add TQ Systems TQMa6 board support This patch adds the changes to boards.cfg and the board directory under board/tqc. TQMa6 is a family of modules based on Freescale i.MX6. It consists of TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3 TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3 The modules need a baseboard. Initially the MBa6x starterkit mainboard is supported. To easy support for other mainboards the functionality is splitted in one file for the module (tqma6.c) and one file for the baseboard (tqma6_ mba6). The modules can be boot from eMMC (on USDHC3) and SPI flash. The following features are supported: - MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard) - Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module. The phy needs special configurations for the pad skew registers to adjust for the signal routing. Also support for standard ethernet commands and uppdate via tftp. - SPI: ECSPI1 with bootable serial flash on module and two additional chip selects on MBa6x - I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3) and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x are also configured. - USB: high speed host 1 on MBa6x and support for USB storage - PMIC: support for pfuze 100 on TQMa6<x> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-07-18 14:52:44 +00:00
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
/* image version */
IMAGE_VERSION 2
#include <config.h>
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
#if defined(CONFIG_TQMA6X_MMC_BOOT)
BOOT_FROM sd
#elif defined(CONFIG_TQMA6X_SPI_BOOT)
BOOT_FROM spi
#endif
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"
#include "asm/arch/crm_regs.h"
/* TQMa6Q/D DDR config Rev. 0100B */
/* IOMUX configuration */
DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00008030
DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030
DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
tqma6: Fix DDR configuration Initially investigating a Linux network issue causing a lot of drop and poor network performances on a custom system based on a TQMA6A module (based on an iMX6Q), [1st link below]. I eventually correlated my observations with a contention at the NIC level when in concurrency with the graphics pipeline. Troubleshooting this in the kernel lead to disabling DMA bursts accesses made by the IPU in order to avoid triggering the QoS at the interconnect level, reducing from 50 to 10% the drop rate on eth0, [2nd link below]. The solution worked on my setup but not on others, which still suffered from abnormally high drop rates even with this "fix". After looking a while into TQ Systems BSP I figured out a number of differences in recent U-Boot out-of-tree patches they had in their repository [3rd link]. Parsing the differences one after the other lead me to this final solution. The reset pad of the DDR controller was apparently misconfigured, Bit 18-19 picturing the "DDR select field". The current value b11 is reserved. The only defined value as of version 6 of the iMX6Q manual was b00 "DDR3 and LPDDR2 mode". In practice no register difference has been spotted after changing this configuration but all issues tracked thus far just vanished. All previous fixes have been proven irrelevant. Just clearing this field solved all our network issues and the drop rate as measured by iperf3 felt back to 0%. Link: https://lore.kernel.org/netdev/20231012193410.3d1812cf@xps-13/ Link: https://lists.freedesktop.org/archives/dri-devel/2023-October/428251.html Link: https://github.com/tq-systems/u-boot-tqmaxx/commit/15eb6abbefbf6916c28467b85485911dad3da6bc Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-11-17 15:00:44 +00:00
DATA 4, MX6_IOM_DRAM_RESET, 0x00003030
Add TQ Systems TQMa6 board support This patch adds the changes to boards.cfg and the board directory under board/tqc. TQMa6 is a family of modules based on Freescale i.MX6. It consists of TQMa6Q (i.MX6 Quad), TQMa6D (i.MX6 Dual) featuring eMMC, and 1 GiB DDR3 TQMa6S (i.MX6 Solo) featuring eMMC and 512 MiB DDR3 The modules need a baseboard. Initially the MBa6x starterkit mainboard is supported. To easy support for other mainboards the functionality is splitted in one file for the module (tqma6.c) and one file for the baseboard (tqma6_ mba6). The modules can be boot from eMMC (on USDHC3) and SPI flash. The following features are supported: - MMC: eMMC on module (on USDHC3) and SD-card (on MBa6x mainboard) - Ethernet: RGMII using micrel KSZ9031 phy on MBa6x mainboard for TQMa6<x> module. The phy needs special configurations for the pad skew registers to adjust for the signal routing. Also support for standard ethernet commands and uppdate via tftp. - SPI: ECSPI1 with bootable serial flash on module and two additional chip selects on MBa6x - I2C: This patch adds support for the I2C busses on the TQMa6<x> modules (I2C3) and MBa6x baseboards (I2C1). The LM75 temperature sensors on TQMa6<x> and MBa6x are also configured. - USB: high speed host 1 on MBa6x and support for USB storage - PMIC: support for pfuze 100 on TQMa6<x> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
2014-07-18 14:52:44 +00:00
DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030
DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030
DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030
DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030
DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030
DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
DATA 4, MX6_IOM_GRP_B0DS, 0x00000030
DATA 4, MX6_IOM_GRP_B1DS, 0x00000030
DATA 4, MX6_IOM_GRP_B2DS, 0x00000030
DATA 4, MX6_IOM_GRP_B3DS, 0x00000030
DATA 4, MX6_IOM_GRP_B4DS, 0x00000030
DATA 4, MX6_IOM_GRP_B5DS, 0x00000030
DATA 4, MX6_IOM_GRP_B6DS, 0x00000030
DATA 4, MX6_IOM_GRP_B7DS, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM0, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM1, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM2, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM3, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM4, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM5, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM6, 0x00000030
DATA 4, MX6_IOM_DRAM_DQM7, 0x00000030
/* memory interface calibration values */
DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003
DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003
DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001B0013
DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0018001B
DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001B0016
DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012001C
DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43400350
DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x023E032C
DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43400348
DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03300304
DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x3C323436
DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x38383242
DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3E3C4440
DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4236483E
DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
/* configure memory interface */
DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036
DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040
DATA 4, MX6_MMDC_P0_MDCFG0, 0x545A79B4
DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64
DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023
DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
DATA 4, MX6_MMDC_P0_MDSCR, 0x00088032
DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
DATA 4, MX6_MMDC_P0_MDSCR, 0x09308030
DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222
DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022222
DATA 4, MX6_MMDC_P0_MDPDC, 0x00025536
DATA 4, MX6_MMDC_P0_MAPSR, 0x00001006
DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
#include "clocks.cfg"
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