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24 lines
927 B
C
24 lines
927 B
C
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/* DO NOT EDIT THIS FILE
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* Automatically generated by generate-def-headers.xsl
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* DO NOT EDIT THIS FILE
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*/
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#ifndef __BFIN_DEF_ADSP_BF531_proc__
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#define __BFIN_DEF_ADSP_BF531_proc__
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#include "../mach-common/ADSP-EDN-core_def.h"
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#include "../mach-common/ADSP-EDN-extended_def.h"
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#define L1_INST_SRAM 0xFFA08000 /* 0xFFA08000 -> 0xFFA0BFFF Instruction Bank A SRAM */
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#define L1_INST_SRAM_SIZE (0xFFA0BFFF - 0xFFA08000 + 1)
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#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
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#define L1_SRAM_SCRATCH 0xFFB00000 /* 0xFFB00000 -> 0xFFB00FFF Scratchpad SRAM */
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#define L1_SRAM_SCRATCH_SIZE (0xFFB00FFF - 0xFFB00000 + 1)
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#define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE)
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#define SYSMMR_BASE 0xFFC00000 /* 0xFFC00000 -> 0xFFFFFFFF MMR registers */
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#define SYSMMR_BASE_SIZE (0xFFFFFFFF - 0xFFC00000 + 1)
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#define SYSMMR_BASE_END (SYSMMR_BASE + SYSMMR_BASE_SIZE)
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#endif /* __BFIN_DEF_ADSP_BF531_proc__ */
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