2011-11-17 00:10:24 +00:00
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/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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2012-06-04 20:02:24 +00:00
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* (C) Copyright 2011-2012
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2011-11-17 00:10:24 +00:00
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* Avionic Design GmbH <www.avionic-design.de>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2011-11-17 00:10:24 +00:00
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*/
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#include <common.h>
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#include <ns16550.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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2012-01-11 12:42:26 +00:00
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#include <asm/arch/funcmux.h>
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2011-11-17 00:10:24 +00:00
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#include <asm/arch/pinmux.h>
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2012-09-19 22:50:56 +00:00
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#include <asm/arch/tegra.h>
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#include <asm/arch-tegra/board.h>
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#include <asm/arch-tegra/clk_rst.h>
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#include <asm/arch-tegra/sys_proto.h>
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#include <asm/arch-tegra/uart.h>
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2011-11-17 00:10:24 +00:00
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2012-06-04 20:02:28 +00:00
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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void gpio_early_init(void)
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{
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2016-05-12 18:07:39 +00:00
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gpio_request(TEGRA_GPIO(I, 4), NULL);
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gpio_direction_output(TEGRA_GPIO(I, 4), 1);
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2012-06-04 20:02:28 +00:00
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}
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#endif
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2012-06-01 08:22:14 +00:00
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#ifdef CONFIG_TEGRA_MMC
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2011-11-17 00:10:24 +00:00
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/*
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* Routine: pin_mux_mmc
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* Description: setup the pin muxes/tristate values for the SDMMC(s)
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*/
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2013-02-21 12:31:30 +00:00
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void pin_mux_mmc(void)
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2011-11-17 00:10:24 +00:00
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{
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2012-01-11 12:42:26 +00:00
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funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
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2012-06-04 20:02:29 +00:00
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/* for write-protect GPIO PI6 */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_ATA);
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2012-06-04 20:02:24 +00:00
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/* for CD GPIO PH2 */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_ATD);
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2011-11-17 00:10:24 +00:00
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}
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#endif
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