2015-05-07 13:34:08 +00:00
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ARCH_QEMU_H_
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#define _ARCH_QEMU_H_
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2015-05-23 16:12:33 +00:00
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/* Programmable Attribute Map (PAM) Registers */
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#define I440FX_PAM 0x59
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#define Q35_PAM 0x90
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#define PAM_NUM 7
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#define PAM_RW 0x33
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2015-05-25 14:36:26 +00:00
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/* IDE Timing Register */
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#define IDE0_TIM 0x40
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#define IDE1_TIM 0x42
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#define IDE_DECODE_EN 0x8000
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2015-05-07 13:34:08 +00:00
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/* I/O Ports */
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#define CMOS_ADDR_PORT 0x70
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#define CMOS_DATA_PORT 0x71
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#define LOW_RAM_ADDR 0x34
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#define HIGH_RAM_ADDR 0x35
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#endif /* _ARCH_QEMU_H_ */
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