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u-boot/configs/socfpga_chameleonv3_defconfig

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config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_ARM=y
Convert CONFIG_SYS_L2_PL310 to Kconfig This converts CONFIG_SYS_L2_PL310 to Kconfig. For omap2 and mvebu the 'select SYS_L2_PL310' locations were determined using ./tools/moveconfig -i CONFIG_SYS_L2_PL310. For mx6 I manually chose ARCH_MX6 as 'select' location. The correctness has been verified using $ ./tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF 0 matches That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert the 'select' statement under ARCH_MX6. Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-08-17 13:07:12 +00:00
CONFIG_SYS_L2_PL310=y
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_ARCH_SOCFPGA=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 12:15:34 +00:00
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x4400
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 12:15:34 +00:00
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
CONFIG_SPL_FS_FAT=y
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_FIT=y
CONFIG_SPL_FIT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-03 14:26:16 +00:00
CONFIG_SYS_BOOTM_LEN=0x2000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-03-27 17:39:17 +00:00
CONFIG_DISTRO_DEFAULTS=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 12:15:34 +00:00
CONFIG_MISC_INIT_R=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-27 14:11:57 +00:00
CONFIG_SPL_MAX_SIZE=0x40000
Merge branch 'next'
2022-07-11 14:18:13 +00:00
CONFIG_SPL_NO_BSS_LIMIT=y
spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_... We like to put the SPL first so it is clear that it relates to SPL. Rename various malloc-related options which have crept in, to stick to this convention. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-09-26 14:14:16 +00:00
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xffe2b000
CONFIG_SPL_SYS_MALLOC_SIZE=0x15000
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_SPL_ENV_SUPPORT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-27 14:11:57 +00:00
CONFIG_SPL_FS_EXT4=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 12:15:34 +00:00
CONFIG_SPL_FPGA=y
mtd: Make CONFIG_MTD be the gate symbol for the menu The help for CONFIG_MTD explains that it needs to be enabled for various things like NAND, etc to be available. It however then doesn't enforce this dependency and so if you have none of these systems present you still need to disable a number of options. Fix this by making places that select/imply one type of flash, but did not do the same, also do this for "MTD". Make boards which hadn't been enabling MTD already but need it now, do so. In a few places, disable CONFIG_CMD_MTDPARTS as it wasn't previously enabled but was now being implied. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-10 18:46:10 +00:00
# CONFIG_CMD_MTDPARTS is not set
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_ENV_IS_IN_MMC=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-04 12:15:34 +00:00
CONFIG_SYS_I2C_DW=y
CONFIG_MISC=y
CONFIG_ATSHA204A=y
CONFIG_FS_LOADER=y
CONFIG_SPL_FS_LOADER=y
CONFIG_MMC_DW=y
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_ETH_DESIGNWARE=y
Convert CONFIG_SYS_NS16550_MEM32 et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_NS16550_MIN_FUNCTIONS CONFIG_SYS_NS16550_MEM32 CONFIG_SYS_NS16550_PORT_MAPPED CONFIG_SYS_NS16550_REG_SIZE CONFIG_SYS_NS16550_SERIAL To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that platforms can enable the legacy driver here for SPL. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-04 14:39:03 +00:00
CONFIG_SYS_NS16550_MEM32=y
config: Add Chameleonv3 config Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel <pan@semihalf.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-06-17 10:47:20 +00:00
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_DESIGNWARE_APB_TIMER=y
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