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https://github.com/AsahiLinux/u-boot
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39 lines
1.3 KiB
C
39 lines
1.3 KiB
C
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/*
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* board.h
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*
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* EETS GmbH PDU001 board information header
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*
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* Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* We have two pin mux functions that must exist. First we need I2C0 to
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* access the TPS65910 PMIC located on the M2 computing module.
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* Second, if we want low-level debugging or a early UART (ie. before the
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* pin controller driver is running), we need one of the UART ports UART0 to
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* UART5 (usually UART3 since it is wired to K2).
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* In case of I2C0 access we explicitly don't rely on the the ROM but we could
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* do so as we use the primary mode (mode 0) for I2C0.
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* All other multiplexing and pin configuration is done by the DT once it
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* gets parsed by the pin controller driver.
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* However we relay on the ROM to configure the pins of MMC0 (eMMC) as well
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* as MMC1 (microSD card-cage) since these are our boot devices.
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*/
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void enable_uart0_pin_mux(void);
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void enable_uart1_pin_mux(void);
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void enable_uart2_pin_mux(void);
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void enable_uart3_pin_mux(void);
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void enable_uart4_pin_mux(void);
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void enable_uart5_pin_mux(void);
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void enable_uart_pin_mux(u32 addr);
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void enable_i2c0_pin_mux(void);
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#endif
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