mirror of
https://github.com/AsahiLinux/u-boot
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109 lines
3.4 KiB
INI
109 lines
3.4 KiB
INI
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/*
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* DENX M53 DRAM init values
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* Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not write to the Free Software
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* Foundation Inc. 51 Franklin Street Fifth Floor Boston,
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* MA 02110-1301 USA
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*
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* Refer docs/README.imxmage for more details about how-to configure
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* and create imximage boot image
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*
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* The syntax is taken as close as possible with the kwbimage
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*/
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#include <asm/imx-common/imximage.cfg>
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/* image version */
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IMAGE_VERSION 2
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/* Boot Offset 0x400, valid for both SD and NAND boot. */
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BOOT_OFFSET FLASH_OFFSET_STANDARD
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/*
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* Device Configuration Data (DCD)
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*
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* Each entry must have the format:
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* Addr-type Address Value
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*
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* where:
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* Addr-type register length (1,2 or 4 bytes)
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* Address absolute address of the register
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* value value to be stored in the register
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*/
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DATA 4 0x53fa86f4 0x00000000 /* GRP_DDRMODE_CTL */
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DATA 4 0x53fa8714 0x00000000 /* GRP_DDRMODE */
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DATA 4 0x53fa86fc 0x00000000 /* GRP_DDRPKE */
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DATA 4 0x53fa8724 0x04000000 /* GRP_DDR_TYPE */
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DATA 4 0x53fa872c 0x00300000 /* GRP_B3DS */
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DATA 4 0x53fa8554 0x00300000 /* DRAM_DQM3 */
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DATA 4 0x53fa8558 0x00300040 /* DRAM_SDQS3 */
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DATA 4 0x53fa8728 0x00300000 /* GRP_B2DS */
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DATA 4 0x53fa8560 0x00300000 /* DRAM_DQM2 */
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DATA 4 0x53fa8568 0x00300040 /* DRAM_SDQS2 */
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DATA 4 0x53fa871c 0x00300000 /* GRP_B1DS */
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DATA 4 0x53fa8594 0x00300000 /* DRAM_DQM1 */
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DATA 4 0x53fa8590 0x00300040 /* DRAM_SDQS1 */
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DATA 4 0x53fa8718 0x00300000 /* GRP_B0DS */
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DATA 4 0x53fa8584 0x00300000 /* DRAM_DQM0 */
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DATA 4 0x53fa857c 0x00300040 /* DRAM_SDQS0 */
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DATA 4 0x53fa8578 0x00300000 /* DRAM_SDCLK_0 */
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DATA 4 0x53fa8570 0x00300000 /* DRAM_SDCLK_1 */
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DATA 4 0x53fa8574 0x00300000 /* DRAM_CAS */
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DATA 4 0x53fa8588 0x00300000 /* DRAM_RAS */
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DATA 4 0x53fa86f0 0x00300000 /* GRP_ADDDS */
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DATA 4 0x53fa8720 0x00300000 /* GRP_CTLDS */
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DATA 4 0x53fa8564 0x00300040 /* DRAM_SDODT1 */
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DATA 4 0x53fa8580 0x00300040 /* DRAM_SDODT0 */
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/* ESDCTL */
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DATA 4 0x63fd9088 0x32383535
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DATA 4 0x63fd9090 0x40383538
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DATA 4 0x63fd907c 0x0136014d
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DATA 4 0x63fd9080 0x01510141
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DATA 4 0x63fd9018 0x00011740
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DATA 4 0x63fd9000 0xc3190000
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DATA 4 0x63fd900c 0x555952e3
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DATA 4 0x63fd9010 0xb68e8b63
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DATA 4 0x63fd9014 0x01ff00db
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DATA 4 0x63fd902c 0x000026d2
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DATA 4 0x63fd9030 0x009f0e21
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DATA 4 0x63fd9008 0x12273030
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DATA 4 0x63fd9004 0x0002002d
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DATA 4 0x63fd901c 0x00008032
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DATA 4 0x63fd901c 0x00008033
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DATA 4 0x63fd901c 0x00028031
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DATA 4 0x63fd901c 0x092080b0
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DATA 4 0x63fd901c 0x04008040
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DATA 4 0x63fd901c 0x0000803a
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DATA 4 0x63fd901c 0x0000803b
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DATA 4 0x63fd901c 0x00028039
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DATA 4 0x63fd901c 0x09208138
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DATA 4 0x63fd901c 0x04008048
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DATA 4 0x63fd9020 0x00001800
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DATA 4 0x63fd9040 0x04b80003
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DATA 4 0x63fd9058 0x00022227
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DATA 4 0x63fd901c 0x00000000
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