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u-boot/configs/chromebook_speedy_defconfig

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rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_ARM=y
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 19:31:07 +00:00
CONFIG_NR_DRAM_BANKS=1
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-06 17:54:25 +00:00
CONFIG_SPL_TEXT_BASE=0xff704000
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 19:54:04 +00:00
CONFIG_SPL_STACK_R_ADDR=0x80000
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_SPL_PAYLOAD="u-boot.img"
Merge branch 'next' Merge all outstanding changes from the current next branch in now that we have released.
2020-07-06 19:46:38 +00:00
CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28 12:46:52 +00:00
CONFIG_DEBUG_UART=y
Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig This converts the following to Kconfig: CONFIG_USE_PREBOOT CONFIG_PREBOOT Both are together in one commit, since otherwise the former causes kconfig to define the latter, which gives duplicate symbol errors. Includes a manual fixup for CONFIG_PREBOOT in ids8313_defconfig since the backslash lands in the wrong place. Similarly with socfpga_vining_fpga. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-07-21 02:51:14 +00:00
CONFIG_USE_PREBOOT=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-09 16:22:06 +00:00
CONFIG_SILENT_CONSOLE=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
rockchip: veyron: move board_early_init_f to _r (after reloc) Previously veyron_init() was called in board_init() context, which is called after relocation. Moving it to veyron.c used board_early_init_f which is called way earlier, and causes veyron_init to hang. Using board_early_init_r instead fixes this. Fixes: b678f2790c ("rockchip: rk3288: Move veyron_init() back to veyron.c") Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-13 19:15:21 +00:00
CONFIG_BOARD_EARLY_INIT_R=y
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SPL_CRC32_SUPPORT is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_OF_PLATDATA=y
env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-13 03:46:36 +00:00
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
# CONFIG_SPL_BLK is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_CROS_EC_KEYB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
CONFIG_PWRSEQ=y
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
# CONFIG_SPL_DM_MMC is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTD Like in Linux, just use CONFIG_MTD to compile the MTD stack. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-10-03 17:50:05 +00:00
CONFIG_MTD=y
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
CONFIG_SF_DEFAULT_BUS=2
Convert CONFIG_SF_DEFAULT_* to Kconfig This converts the following to Kconfig: CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_MODE CONFIG_SF_DEFAULT_SPEED I use moveconfig script and then manual check on generated u-boot.cfg to solve the remaining issue. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-27 14:20:36 +00:00
CONFIG_SF_DEFAULT_SPEED=20000000
configs: Move CONFIG_SPI_FLASH_GIGADEVICE properly into Kconfig Affects rk3288 veyrons and rk3036, this was mostly done by moveconfig.py. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:03 +00:00
CONFIG_SPI_FLASH_GIGADEVICE=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_PINCTRL=y
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
CONFIG_PINCONF=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_SPL_PINCTRL=y
defconfig: veyron: no need for CONFIG_SPL_PINCTRL_FULL Veyrons do not need full pinctrl support for SPL. The full pinctrl support does nothing when enabled with OF_PLATDATA, thus was already unused. This frees about 4kB of SPL size. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-13 19:15:23 +00:00
# CONFIG_SPL_PINCTRL_FULL is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK8XX=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SERIAL=y
CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
# CONFIG_SPL_DM_USB is not set
CONFIG_USB_DWC2=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_DM_VIDEO=y
video: enable VIDEO_ANSI and all VIDEO_BBP options This partially reverts changes by commit 2cc393f32fd9 ("video: make BPP and ANSI configs optional") since it caused issues with other boards (missing LCD console output on pinebook, x86 platform or sandbox). Enable all disabled options again and opt out of not supported color depth in board defconfigs. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reported-by: Vagrant Cascadian <vagrant@debian.org>
2020-02-04 21:43:06 +00:00
# CONFIG_VIDEO_BPP8 is not set
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_EDP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
# CONFIG_USE_PRIVATE_LIBGCC is not set
configs: update rk3288 veyron defconfigs Updates jerry, mickey, minnie and speedy defconfigs to: - fit the SPL in 32k - boot from SPI (only) - remove gadget support (these have no OTG port) Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Rebase on top of tree) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-13 13:51:05 +00:00
CONFIG_SPL_TINY_MEMSET=y
rockchip: add support for veyron-speedy (ASUS Chromebook C201) This adds support for the ASUS C201, a RK3288-based clamshell device. The device tree comes from linus's linux tree at 3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters are for 4GB Samsung LPDDR3, decoded from coreboot's src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-06 02:12:08 +00:00
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
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