u-boot/configs/am62x_evm_a53_defconfig

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CONFIG_ARM=y
CONFIG_ARCH_K3=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SOC_K3_AM625=y
CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
CONFIG_TARGET_AM625_A53_EVM=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
configs: am62x_evm_a53_defconfig: Changes in memory to support SPL splash screen To enable splash at A53 SPL, need to do memory map changes which involves locate stack above malloc and have enough space to load bmp image above stack. To load a 1920X1200 image a minimum of 8.8MB space is needed, to support it move malloc down to 0x80b80000 from 0x80480000 and bss to 0x80c80000 to have 1MB buffer between malloc and BSS. Observed SPL size 195KB, CONFIG_SPL_SIZE_LIMIT set to 256KB. Observed stack size 1904Bytes, CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK set to 2KB. CONFIG_SPL_SYS_REPORT_STACK_F_USAGE config sets stack above the malloc and reports for stack overflow. Memory map at A53 SPL before splash screen 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | | | | | Empty 3.6MB | | | | | 0x80477660+---------------------+ | Stack 2 KB | 0x80477e60+---------------------+ | GD 416 Bytes | 0x80478000+---------------------+ | Malloc 352 KB | | | 0x80480000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x80a00000+---------------------+ | | | BSS 512 KB | | | 0x80a80000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x81000000+---------------------+FIT Image load address New memory map with splash screen at SPL 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | Empty 1.1MB | | | 0x80200000+---------------------+ | | | | | | | BMP Image Load | | | | 9.4 MB | | | | | | | | | | | | | 0x80b77660+---------------------+ | Stack 2KB | 0x80b77e60+---------------------+ | GD 416 Bytes | 0x80b78000+---------------------+ | | | Malloc 352KB | 0x80b80000+---------------------+ | | | Empty 1 MB | | | 0x80c80000+---------------------+ | BSS 512 KB | | | 0x80d00000+---------------------+ | | | | | Empty 3.0 MB | | | | | | | 0x81000000+---------------------+FIT Image load addressi Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-04-10 08:49:10 +00:00
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
CONFIG_SF_DEFAULT_SPEED=25000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
configs: am62x_evm_a53_defconfig: Changes in memory to support SPL splash screen To enable splash at A53 SPL, need to do memory map changes which involves locate stack above malloc and have enough space to load bmp image above stack. To load a 1920X1200 image a minimum of 8.8MB space is needed, to support it move malloc down to 0x80b80000 from 0x80480000 and bss to 0x80c80000 to have 1MB buffer between malloc and BSS. Observed SPL size 195KB, CONFIG_SPL_SIZE_LIMIT set to 256KB. Observed stack size 1904Bytes, CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK set to 2KB. CONFIG_SPL_SYS_REPORT_STACK_F_USAGE config sets stack above the malloc and reports for stack overflow. Memory map at A53 SPL before splash screen 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | | | | | Empty 3.6MB | | | | | 0x80477660+---------------------+ | Stack 2 KB | 0x80477e60+---------------------+ | GD 416 Bytes | 0x80478000+---------------------+ | Malloc 352 KB | | | 0x80480000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x80a00000+---------------------+ | | | BSS 512 KB | | | 0x80a80000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x81000000+---------------------+FIT Image load address New memory map with splash screen at SPL 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | Empty 1.1MB | | | 0x80200000+---------------------+ | | | | | | | BMP Image Load | | | | 9.4 MB | | | | | | | | | | | | | 0x80b77660+---------------------+ | Stack 2KB | 0x80b77e60+---------------------+ | GD 416 Bytes | 0x80b78000+---------------------+ | | | Malloc 352KB | 0x80b80000+---------------------+ | | | Empty 1 MB | | | 0x80c80000+---------------------+ | BSS 512 KB | | | 0x80d00000+---------------------+ | | | | | Empty 3.0 MB | | | | | | | 0x81000000+---------------------+FIT Image load addressi Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-04-10 08:49:10 +00:00
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
configs: am62x_evm_a53_defconfig: Changes in memory to support SPL splash screen To enable splash at A53 SPL, need to do memory map changes which involves locate stack above malloc and have enough space to load bmp image above stack. To load a 1920X1200 image a minimum of 8.8MB space is needed, to support it move malloc down to 0x80b80000 from 0x80480000 and bss to 0x80c80000 to have 1MB buffer between malloc and BSS. Observed SPL size 195KB, CONFIG_SPL_SIZE_LIMIT set to 256KB. Observed stack size 1904Bytes, CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK set to 2KB. CONFIG_SPL_SYS_REPORT_STACK_F_USAGE config sets stack above the malloc and reports for stack overflow. Memory map at A53 SPL before splash screen 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | | | | | Empty 3.6MB | | | | | 0x80477660+---------------------+ | Stack 2 KB | 0x80477e60+---------------------+ | GD 416 Bytes | 0x80478000+---------------------+ | Malloc 352 KB | | | 0x80480000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x80a00000+---------------------+ | | | BSS 512 KB | | | 0x80a80000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x81000000+---------------------+FIT Image load address New memory map with splash screen at SPL 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | Empty 1.1MB | | | 0x80200000+---------------------+ | | | | | | | BMP Image Load | | | | 9.4 MB | | | | | | | | | | | | | 0x80b77660+---------------------+ | Stack 2KB | 0x80b77e60+---------------------+ | GD 416 Bytes | 0x80b78000+---------------------+ | | | Malloc 352KB | 0x80b80000+---------------------+ | | | Empty 1 MB | | | 0x80c80000+---------------------+ | BSS 512 KB | | | 0x80d00000+---------------------+ | | | | | Empty 3.0 MB | | | | | | | 0x81000000+---------------------+FIT Image load addressi Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-04-10 08:49:10 +00:00
CONFIG_SPL_BSS_START_ADDR=0x80c80000
CONFIG_SPL_BSS_MAX_SIZE=0x80000
configs: am62x_evm_a53_defconfig: Changes in memory to support SPL splash screen To enable splash at A53 SPL, need to do memory map changes which involves locate stack above malloc and have enough space to load bmp image above stack. To load a 1920X1200 image a minimum of 8.8MB space is needed, to support it move malloc down to 0x80b80000 from 0x80480000 and bss to 0x80c80000 to have 1MB buffer between malloc and BSS. Observed SPL size 195KB, CONFIG_SPL_SIZE_LIMIT set to 256KB. Observed stack size 1904Bytes, CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK set to 2KB. CONFIG_SPL_SYS_REPORT_STACK_F_USAGE config sets stack above the malloc and reports for stack overflow. Memory map at A53 SPL before splash screen 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | | | | | Empty 3.6MB | | | | | 0x80477660+---------------------+ | Stack 2 KB | 0x80477e60+---------------------+ | GD 416 Bytes | 0x80478000+---------------------+ | Malloc 352 KB | | | 0x80480000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x80a00000+---------------------+ | | | BSS 512 KB | | | 0x80a80000+---------------------+ | | | | | | | | | Empty 5.5 MB | | | | | | | | | 0x81000000+---------------------+FIT Image load address New memory map with splash screen at SPL 0x80000000+---------------------+ | Empty 512 KB | | | 0x80080000+---------------------+ | Text Base | | 352 KB | | | 0x800D8000+---------------------+ | Empty 1.1MB | | | 0x80200000+---------------------+ | | | | | | | BMP Image Load | | | | 9.4 MB | | | | | | | | | | | | | 0x80b77660+---------------------+ | Stack 2KB | 0x80b77e60+---------------------+ | GD 416 Bytes | 0x80b78000+---------------------+ | | | Malloc 352KB | 0x80b80000+---------------------+ | | | Empty 1 MB | | | 0x80c80000+---------------------+ | BSS 512 KB | | | 0x80d00000+---------------------+ | | | | | Empty 3.0 MB | | | | | | | 0x81000000+---------------------+FIT Image load addressi Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-04-10 08:49:10 +00:00
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER_DOMAIN=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_MMC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_TI_SCI=y
CONFIG_DMA_CHANNELS=y
CONFIG_TI_K3_NAVSS_UDMA=y
CONFIG_TI_SCI_PROTOCOL=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_S28HX_T=y
CONFIG_PHY_TI_DP83867=y
CONFIG_PHY_FIXED=y
CONFIG_TI_AM65_CPSW_NUSS=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_POWER_DOMAIN=y
CONFIG_TI_SCI_POWER_DOMAIN=y
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
CONFIG_RESET_TI_SCI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
CONFIG_SOC_TI=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384