2020-04-08 22:57:36 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Helpers for ACPI table generation
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*
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* Based on acpi.c from coreboot
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*
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* Copyright 2019 Google LLC
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*
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* Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*/
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#ifndef __ACPI_TABLE_H__
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#define __ACPI_TABLE_H__
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2020-09-22 18:45:39 +00:00
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#include <dm/acpi.h>
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2020-05-10 17:40:13 +00:00
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2020-04-08 22:57:36 +00:00
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#define RSDP_SIG "RSD PTR " /* RSDP pointer signature */
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#define OEM_ID "U-BOOT" /* U-Boot */
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#define OEM_TABLE_ID "U-BOOTBL" /* U-Boot Table */
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#define ASLC_ID "INTL" /* Intel ASL Compiler */
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2020-09-22 18:45:09 +00:00
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/* TODO(sjg@chromium.org): Figure out how to get compiler revision */
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#define ASL_REVISION 0
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2020-04-08 22:57:36 +00:00
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#define ACPI_RSDP_REV_ACPI_1_0 0
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#define ACPI_RSDP_REV_ACPI_2_0 2
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2020-04-08 22:57:37 +00:00
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#if !defined(__ACPI__)
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2020-09-22 18:45:41 +00:00
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#include <linux/bitops.h>
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2020-04-26 15:19:47 +00:00
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struct acpi_ctx;
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2020-04-08 22:57:36 +00:00
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/*
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* RSDP (Root System Description Pointer)
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* Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
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*/
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struct acpi_rsdp {
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char signature[8]; /* RSDP signature */
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u8 checksum; /* Checksum of the first 20 bytes */
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char oem_id[6]; /* OEM ID */
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u8 revision; /* 0 for ACPI 1.0, others 2 */
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u32 rsdt_address; /* Physical address of RSDT (32 bits) */
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u32 length; /* Total RSDP length (incl. extended part) */
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u64 xsdt_address; /* Physical address of XSDT (64 bits) */
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u8 ext_checksum; /* Checksum of the whole table */
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u8 reserved[3];
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};
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/* Generic ACPI header, provided by (almost) all tables */
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struct __packed acpi_table_header {
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2020-09-22 18:45:39 +00:00
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char signature[ACPI_NAME_LEN]; /* ACPI signature (4 ASCII chars) */
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2020-04-08 22:57:36 +00:00
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u32 length; /* Table length in bytes (incl. header) */
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u8 revision; /* Table version (not ACPI version!) */
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volatile u8 checksum; /* To make sum of entire table == 0 */
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char oem_id[6]; /* OEM identification */
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char oem_table_id[8]; /* OEM table identification */
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u32 oem_revision; /* OEM revision number */
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char aslc_id[4]; /* ASL compiler vendor ID */
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u32 aslc_revision; /* ASL compiler revision number */
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};
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2020-09-22 18:45:09 +00:00
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struct acpi_gen_regaddr {
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u8 space_id; /* Address space ID */
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u8 bit_width; /* Register size in bits */
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u8 bit_offset; /* Register bit offset */
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u8 access_size; /* Access size */
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u32 addrl; /* Register address, low 32 bits */
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u32 addrh; /* Register address, high 32 bits */
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};
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2020-04-08 22:57:36 +00:00
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/* A maximum number of 32 ACPI tables ought to be enough for now */
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#define MAX_ACPI_TABLES 32
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/* RSDT (Root System Description Table) */
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struct acpi_rsdt {
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struct acpi_table_header header;
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u32 entry[MAX_ACPI_TABLES];
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};
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/* XSDT (Extended System Description Table) */
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struct acpi_xsdt {
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struct acpi_table_header header;
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u64 entry[MAX_ACPI_TABLES];
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};
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2020-09-22 18:45:09 +00:00
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/* HPET timers */
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struct __packed acpi_hpet {
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struct acpi_table_header header;
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u32 id;
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struct acpi_gen_regaddr addr;
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u8 number;
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u16 min_tick;
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u8 attributes;
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};
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2020-09-22 18:45:32 +00:00
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struct __packed acpi_tpm2 {
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struct acpi_table_header header;
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u16 platform_class;
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u8 reserved[2];
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u64 control_area;
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u32 start_method;
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u8 msp[12];
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u32 laml;
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u64 lasa;
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};
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2020-09-22 18:45:33 +00:00
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struct __packed acpi_tcpa {
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struct acpi_table_header header;
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u16 platform_class;
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u32 laml;
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u64 lasa;
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};
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2020-04-08 22:57:36 +00:00
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/* FADT Preferred Power Management Profile */
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enum acpi_pm_profile {
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ACPI_PM_UNSPECIFIED = 0,
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ACPI_PM_DESKTOP,
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ACPI_PM_MOBILE,
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ACPI_PM_WORKSTATION,
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ACPI_PM_ENTERPRISE_SERVER,
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ACPI_PM_SOHO_SERVER,
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ACPI_PM_APPLIANCE_PC,
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ACPI_PM_PERFORMANCE_SERVER,
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ACPI_PM_TABLET
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};
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/* FADT flags for p_lvl2_lat and p_lvl3_lat */
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#define ACPI_FADT_C2_NOT_SUPPORTED 101
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#define ACPI_FADT_C3_NOT_SUPPORTED 1001
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/* FADT Boot Architecture Flags */
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#define ACPI_FADT_LEGACY_FREE 0x00
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#define ACPI_FADT_LEGACY_DEVICES BIT(0)
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#define ACPI_FADT_8042 BIT(1)
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#define ACPI_FADT_VGA_NOT_PRESENT BIT(2)
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#define ACPI_FADT_MSI_NOT_SUPPORTED BIT(3)
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#define ACPI_FADT_NO_PCIE_ASPM_CONTROL BIT(4)
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/* FADT Feature Flags */
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#define ACPI_FADT_WBINVD BIT(0)
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#define ACPI_FADT_WBINVD_FLUSH BIT(1)
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#define ACPI_FADT_C1_SUPPORTED BIT(2)
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#define ACPI_FADT_C2_MP_SUPPORTED BIT(3)
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#define ACPI_FADT_POWER_BUTTON BIT(4)
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#define ACPI_FADT_SLEEP_BUTTON BIT(5)
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#define ACPI_FADT_FIXED_RTC BIT(6)
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#define ACPI_FADT_S4_RTC_WAKE BIT(7)
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#define ACPI_FADT_32BIT_TIMER BIT(8)
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#define ACPI_FADT_DOCKING_SUPPORTED BIT(9)
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#define ACPI_FADT_RESET_REGISTER BIT(10)
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#define ACPI_FADT_SEALED_CASE BIT(11)
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#define ACPI_FADT_HEADLESS BIT(12)
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#define ACPI_FADT_SLEEP_TYPE BIT(13)
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#define ACPI_FADT_PCI_EXPRESS_WAKE BIT(14)
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#define ACPI_FADT_PLATFORM_CLOCK BIT(15)
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#define ACPI_FADT_S4_RTC_VALID BIT(16)
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#define ACPI_FADT_REMOTE_POWER_ON BIT(17)
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#define ACPI_FADT_APIC_CLUSTER BIT(18)
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#define ACPI_FADT_APIC_PHYSICAL BIT(19)
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#define ACPI_FADT_HW_REDUCED_ACPI BIT(20)
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#define ACPI_FADT_LOW_PWR_IDLE_S0 BIT(21)
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2021-12-01 16:03:08 +00:00
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/* ARM boot flags */
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#define ACPI_ARM_PSCI_COMPLIANT BIT(0)
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2020-04-08 22:57:36 +00:00
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enum acpi_address_space_type {
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ACPI_ADDRESS_SPACE_MEMORY = 0, /* System memory */
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ACPI_ADDRESS_SPACE_IO, /* System I/O */
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ACPI_ADDRESS_SPACE_PCI, /* PCI config space */
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ACPI_ADDRESS_SPACE_EC, /* Embedded controller */
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ACPI_ADDRESS_SPACE_SMBUS, /* SMBus */
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ACPI_ADDRESS_SPACE_PCC = 0x0a, /* Platform Comm. Channel */
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ACPI_ADDRESS_SPACE_FIXED = 0x7f /* Functional fixed hardware */
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};
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enum acpi_address_space_size {
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ACPI_ACCESS_SIZE_UNDEFINED = 0,
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ACPI_ACCESS_SIZE_BYTE_ACCESS,
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ACPI_ACCESS_SIZE_WORD_ACCESS,
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ACPI_ACCESS_SIZE_DWORD_ACCESS,
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ACPI_ACCESS_SIZE_QWORD_ACCESS
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};
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/* FADT (Fixed ACPI Description Table) */
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struct __packed acpi_fadt {
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struct acpi_table_header header;
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u32 firmware_ctrl;
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u32 dsdt;
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u8 res1;
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u8 preferred_pm_profile;
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u16 sci_int;
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u32 smi_cmd;
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u8 acpi_enable;
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u8 acpi_disable;
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u8 s4bios_req;
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u8 pstate_cnt;
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u32 pm1a_evt_blk;
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u32 pm1b_evt_blk;
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u32 pm1a_cnt_blk;
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u32 pm1b_cnt_blk;
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u32 pm2_cnt_blk;
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u32 pm_tmr_blk;
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u32 gpe0_blk;
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u32 gpe1_blk;
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u8 pm1_evt_len;
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u8 pm1_cnt_len;
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u8 pm2_cnt_len;
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u8 pm_tmr_len;
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u8 gpe0_blk_len;
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u8 gpe1_blk_len;
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u8 gpe1_base;
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u8 cst_cnt;
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u16 p_lvl2_lat;
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u16 p_lvl3_lat;
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u16 flush_size;
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u16 flush_stride;
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u8 duty_offset;
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u8 duty_width;
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u8 day_alrm;
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u8 mon_alrm;
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u8 century;
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u16 iapc_boot_arch;
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u8 res2;
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u32 flags;
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struct acpi_gen_regaddr reset_reg;
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u8 reset_value;
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u16 arm_boot_arch;
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u8 minor_revision;
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u32 x_firmware_ctl_l;
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u32 x_firmware_ctl_h;
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u32 x_dsdt_l;
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u32 x_dsdt_h;
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struct acpi_gen_regaddr x_pm1a_evt_blk;
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struct acpi_gen_regaddr x_pm1b_evt_blk;
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struct acpi_gen_regaddr x_pm1a_cnt_blk;
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struct acpi_gen_regaddr x_pm1b_cnt_blk;
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struct acpi_gen_regaddr x_pm2_cnt_blk;
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struct acpi_gen_regaddr x_pm_tmr_blk;
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struct acpi_gen_regaddr x_gpe0_blk;
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struct acpi_gen_regaddr x_gpe1_blk;
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2021-12-01 16:03:08 +00:00
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struct acpi_gen_regaddr sleep_control_reg;
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struct acpi_gen_regaddr sleep_status_reg;
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u64 hyp_vendor_id;
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2020-04-08 22:57:36 +00:00
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};
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2020-04-08 22:57:38 +00:00
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/* FADT TABLE Revision values - note these do not match the ACPI revision */
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#define ACPI_FADT_REV_ACPI_1_0 1
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#define ACPI_FADT_REV_ACPI_2_0 3
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#define ACPI_FADT_REV_ACPI_3_0 4
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#define ACPI_FADT_REV_ACPI_4_0 4
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#define ACPI_FADT_REV_ACPI_5_0 5
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#define ACPI_FADT_REV_ACPI_6_0 6
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/* MADT TABLE Revision values - note these do not match the ACPI revision */
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#define ACPI_MADT_REV_ACPI_3_0 2
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#define ACPI_MADT_REV_ACPI_4_0 3
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#define ACPI_MADT_REV_ACPI_5_0 3
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#define ACPI_MADT_REV_ACPI_6_0 5
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#define ACPI_MCFG_REV_ACPI_3_0 1
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/* IVRS Revision Field */
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#define IVRS_FORMAT_FIXED 0x01 /* Type 10h & 11h only */
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#define IVRS_FORMAT_MIXED 0x02 /* Type 10h, 11h, & 40h */
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2020-04-08 22:57:36 +00:00
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/* FACS flags */
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#define ACPI_FACS_S4BIOS_F BIT(0)
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#define ACPI_FACS_64BIT_WAKE_F BIT(1)
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/* FACS (Firmware ACPI Control Structure) */
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struct acpi_facs {
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2020-09-22 18:45:39 +00:00
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char signature[ACPI_NAME_LEN]; /* "FACS" */
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2020-04-08 22:57:36 +00:00
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u32 length; /* Length in bytes (>= 64) */
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u32 hardware_signature; /* Hardware signature */
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u32 firmware_waking_vector; /* Firmware waking vector */
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u32 global_lock; /* Global lock */
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u32 flags; /* FACS flags */
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u32 x_firmware_waking_vector_l; /* X FW waking vector, low */
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u32 x_firmware_waking_vector_h; /* X FW waking vector, high */
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u8 version; /* Version 2 */
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u8 res1[3];
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u32 ospm_flags; /* OSPM enabled flags */
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u8 res2[24];
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};
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/* MADT flags */
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#define ACPI_MADT_PCAT_COMPAT BIT(0)
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/* MADT (Multiple APIC Description Table) */
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struct acpi_madt {
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struct acpi_table_header header;
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u32 lapic_addr; /* Local APIC address */
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u32 flags; /* Multiple APIC flags */
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};
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/* MADT: APIC Structure Type*/
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enum acpi_apic_types {
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ACPI_APIC_LAPIC = 0, /* Processor local APIC */
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ACPI_APIC_IOAPIC, /* I/O APIC */
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ACPI_APIC_IRQ_SRC_OVERRIDE, /* Interrupt source override */
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ACPI_APIC_NMI_SRC, /* NMI source */
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ACPI_APIC_LAPIC_NMI, /* Local APIC NMI */
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ACPI_APIC_LAPIC_ADDR_OVERRIDE, /* Local APIC address override */
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ACPI_APIC_IOSAPIC, /* I/O SAPIC */
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ACPI_APIC_LSAPIC, /* Local SAPIC */
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ACPI_APIC_PLATFORM_IRQ_SRC, /* Platform interrupt sources */
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ACPI_APIC_LX2APIC, /* Processor local x2APIC */
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ACPI_APIC_LX2APIC_NMI, /* Local x2APIC NMI */
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2021-12-01 16:03:08 +00:00
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ACPI_APIC_GICC, /* Generic Interrupt Ctlr CPU i/f */
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ACPI_APIC_GICD /* Generic Interrupt Ctlr Distributor */
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2020-04-08 22:57:36 +00:00
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};
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/* MADT: Processor Local APIC Structure */
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#define LOCAL_APIC_FLAG_ENABLED BIT(0)
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|
struct acpi_madt_lapic {
|
|
|
|
u8 type; /* Type (0) */
|
|
|
|
u8 length; /* Length in bytes (8) */
|
|
|
|
u8 processor_id; /* ACPI processor ID */
|
|
|
|
u8 apic_id; /* Local APIC ID */
|
|
|
|
u32 flags; /* Local APIC flags */
|
|
|
|
};
|
|
|
|
|
|
|
|
/* MADT: I/O APIC Structure */
|
|
|
|
struct acpi_madt_ioapic {
|
|
|
|
u8 type; /* Type (1) */
|
|
|
|
u8 length; /* Length in bytes (12) */
|
|
|
|
u8 ioapic_id; /* I/O APIC ID */
|
|
|
|
u8 reserved;
|
|
|
|
u32 ioapic_addr; /* I/O APIC address */
|
|
|
|
u32 gsi_base; /* Global system interrupt base */
|
|
|
|
};
|
|
|
|
|
|
|
|
/* MADT: Interrupt Source Override Structure */
|
|
|
|
struct __packed acpi_madt_irqoverride {
|
|
|
|
u8 type; /* Type (2) */
|
|
|
|
u8 length; /* Length in bytes (10) */
|
|
|
|
u8 bus; /* ISA (0) */
|
|
|
|
u8 source; /* Bus-relative int. source (IRQ) */
|
|
|
|
u32 gsirq; /* Global system interrupt */
|
|
|
|
u16 flags; /* MPS INTI flags */
|
|
|
|
};
|
|
|
|
|
|
|
|
/* MADT: Local APIC NMI Structure */
|
|
|
|
struct __packed acpi_madt_lapic_nmi {
|
|
|
|
u8 type; /* Type (4) */
|
|
|
|
u8 length; /* Length in bytes (6) */
|
|
|
|
u8 processor_id; /* ACPI processor ID */
|
|
|
|
u16 flags; /* MPS INTI flags */
|
|
|
|
u8 lint; /* Local APIC LINT# */
|
|
|
|
};
|
|
|
|
|
2021-12-01 16:03:08 +00:00
|
|
|
/* flags for acpi_madr_gicc flags word */
|
|
|
|
enum {
|
|
|
|
ACPI_MADRF_ENABLED = BIT(0),
|
|
|
|
ACPI_MADRF_PERF = BIT(1),
|
|
|
|
ACPI_MADRF_VGIC = BIT(2),
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct __packed acpi_madr_gicc - GIC CPU interface (type 0xb)
|
|
|
|
*
|
|
|
|
* This holds information about the Generic Interrupt Controller (GIC) CPU
|
|
|
|
* interface. See ACPI Spec v6.3 section 5.2.12.14
|
|
|
|
*/
|
|
|
|
struct __packed acpi_madr_gicc {
|
|
|
|
u8 type;
|
|
|
|
u8 length;
|
|
|
|
u16 reserved;
|
|
|
|
u32 cpu_if_num;
|
|
|
|
u32 processor_id;
|
|
|
|
u32 flags;
|
|
|
|
u32 parking_proto;
|
|
|
|
u32 perf_gsiv;
|
|
|
|
u64 parked_addr;
|
|
|
|
u64 phys_base;
|
|
|
|
u64 gicv;
|
|
|
|
u64 gich;
|
|
|
|
u32 vgic_maint_irq;
|
|
|
|
u64 gicr_base;
|
|
|
|
u64 mpidr;
|
|
|
|
u8 efficiency;
|
|
|
|
u8 reserved2;
|
|
|
|
u16 spi_overflow_irq;
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct __packed acpi_madr_gicc - GIC distributor (type 0xc)
|
|
|
|
*
|
|
|
|
* This holds information about the Generic Interrupt Controller (GIC)
|
|
|
|
* Distributor interface. See ACPI Spec v6.3 section 5.2.12.15
|
|
|
|
*/
|
|
|
|
struct __packed acpi_madr_gicd {
|
|
|
|
u8 type;
|
|
|
|
u8 length;
|
|
|
|
u16 reserved;
|
|
|
|
u32 gic_id;
|
|
|
|
u64 phys_base;
|
|
|
|
u32 reserved2;
|
|
|
|
u8 gic_version;
|
|
|
|
u8 reserved3[3];
|
|
|
|
};
|
|
|
|
|
2020-04-08 22:57:36 +00:00
|
|
|
/* MCFG (PCI Express MMIO config space BAR description table) */
|
|
|
|
struct acpi_mcfg {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
u8 reserved[8];
|
|
|
|
};
|
|
|
|
|
|
|
|
struct acpi_mcfg_mmconfig {
|
|
|
|
u32 base_address_l;
|
|
|
|
u32 base_address_h;
|
|
|
|
u16 pci_segment_group_number;
|
|
|
|
u8 start_bus_number;
|
|
|
|
u8 end_bus_number;
|
|
|
|
u8 reserved[4];
|
|
|
|
};
|
|
|
|
|
|
|
|
/* PM1_CNT bit defines */
|
|
|
|
#define PM1_CNT_SCI_EN BIT(0)
|
|
|
|
|
|
|
|
/* ACPI global NVS structure */
|
|
|
|
struct acpi_global_nvs;
|
|
|
|
|
|
|
|
/* CSRT (Core System Resource Table) */
|
|
|
|
struct acpi_csrt {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
};
|
|
|
|
|
2021-12-01 16:03:08 +00:00
|
|
|
/**
|
|
|
|
* struct acpi_csrt_group - header for a group within the CSRT
|
|
|
|
*
|
|
|
|
* The CSRT consists of one or more groups and this is the header for each
|
|
|
|
*
|
|
|
|
* See Core System Resources Table (CSRT), March 13, 2017, Microsoft Corporation
|
|
|
|
* for details
|
|
|
|
*
|
|
|
|
* https://uefi.org/sites/default/files/resources/CSRT%20v2.pdf
|
|
|
|
*
|
|
|
|
* @shared_info_length indicates the number of shared-info bytes following this
|
|
|
|
* struct (which may be 0)
|
|
|
|
*/
|
2020-04-08 22:57:36 +00:00
|
|
|
struct acpi_csrt_group {
|
|
|
|
u32 length;
|
|
|
|
u32 vendor_id;
|
|
|
|
u32 subvendor_id;
|
|
|
|
u16 device_id;
|
|
|
|
u16 subdevice_id;
|
|
|
|
u16 revision;
|
|
|
|
u16 reserved;
|
|
|
|
u32 shared_info_length;
|
|
|
|
};
|
|
|
|
|
2021-12-01 16:03:08 +00:00
|
|
|
/**
|
|
|
|
* struct acpi_csrt_descriptor - describes the information that follows
|
|
|
|
*
|
|
|
|
* See the spec as above for details
|
|
|
|
*/
|
|
|
|
struct acpi_csrt_descriptor {
|
|
|
|
u32 length;
|
|
|
|
u16 type;
|
|
|
|
u16 subtype;
|
|
|
|
u32 uid;
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct acpi_csrt_shared_info - shared info for Intel tangier
|
|
|
|
*
|
|
|
|
* This provides the shared info for this particular board. Notes that the CSRT
|
|
|
|
* does not describe the format of data, so this format may not be used by any
|
|
|
|
* other board.
|
|
|
|
*/
|
2020-04-08 22:57:36 +00:00
|
|
|
struct acpi_csrt_shared_info {
|
|
|
|
u16 major_version;
|
|
|
|
u16 minor_version;
|
|
|
|
u32 mmio_base_low;
|
|
|
|
u32 mmio_base_high;
|
|
|
|
u32 gsi_interrupt;
|
|
|
|
u8 interrupt_polarity;
|
|
|
|
u8 interrupt_mode;
|
|
|
|
u8 num_channels;
|
|
|
|
u8 dma_address_width;
|
|
|
|
u16 base_request_line;
|
|
|
|
u16 num_handshake_signals;
|
|
|
|
u32 max_block_size;
|
|
|
|
};
|
|
|
|
|
2020-09-22 18:45:16 +00:00
|
|
|
/* Port types for ACPI _UPC object */
|
|
|
|
enum acpi_upc_type {
|
|
|
|
UPC_TYPE_A,
|
|
|
|
UPC_TYPE_MINI_AB,
|
|
|
|
UPC_TYPE_EXPRESSCARD,
|
|
|
|
UPC_TYPE_USB3_A,
|
|
|
|
UPC_TYPE_USB3_B,
|
|
|
|
UPC_TYPE_USB3_MICRO_B,
|
|
|
|
UPC_TYPE_USB3_MICRO_AB,
|
|
|
|
UPC_TYPE_USB3_POWER_B,
|
|
|
|
UPC_TYPE_C_USB2_ONLY,
|
|
|
|
UPC_TYPE_C_USB2_SS_SWITCH,
|
|
|
|
UPC_TYPE_C_USB2_SS,
|
|
|
|
UPC_TYPE_PROPRIETARY = 0xff,
|
|
|
|
/*
|
|
|
|
* The following types are not directly defined in the ACPI
|
|
|
|
* spec but are used by coreboot to identify a USB device type.
|
|
|
|
*/
|
|
|
|
UPC_TYPE_INTERNAL = 0xff,
|
|
|
|
UPC_TYPE_UNUSED,
|
|
|
|
UPC_TYPE_HUB
|
|
|
|
};
|
|
|
|
|
|
|
|
enum dev_scope_type {
|
|
|
|
SCOPE_PCI_ENDPOINT = 1,
|
|
|
|
SCOPE_PCI_SUB = 2,
|
|
|
|
SCOPE_IOAPIC = 3,
|
|
|
|
SCOPE_MSI_HPET = 4,
|
|
|
|
SCOPE_ACPI_NAMESPACE_DEVICE = 5
|
|
|
|
};
|
|
|
|
|
|
|
|
struct __packed dev_scope {
|
|
|
|
u8 type;
|
|
|
|
u8 length;
|
|
|
|
u8 reserved[2];
|
|
|
|
u8 enumeration;
|
|
|
|
u8 start_bus;
|
|
|
|
struct {
|
|
|
|
u8 dev;
|
|
|
|
u8 fn;
|
|
|
|
} __packed path[0];
|
|
|
|
};
|
|
|
|
|
2020-04-08 22:57:39 +00:00
|
|
|
enum dmar_type {
|
|
|
|
DMAR_DRHD = 0,
|
|
|
|
DMAR_RMRR = 1,
|
|
|
|
DMAR_ATSR = 2,
|
|
|
|
DMAR_RHSA = 3,
|
|
|
|
DMAR_ANDD = 4
|
|
|
|
};
|
|
|
|
|
|
|
|
enum {
|
|
|
|
DRHD_INCLUDE_PCI_ALL = BIT(0)
|
|
|
|
};
|
|
|
|
|
|
|
|
enum dmar_flags {
|
|
|
|
DMAR_INTR_REMAP = BIT(0),
|
|
|
|
DMAR_X2APIC_OPT_OUT = BIT(1),
|
|
|
|
DMAR_CTRL_PLATFORM_OPT_IN_FLAG = BIT(2),
|
|
|
|
};
|
|
|
|
|
|
|
|
struct dmar_entry {
|
|
|
|
u16 type;
|
|
|
|
u16 length;
|
|
|
|
u8 flags;
|
|
|
|
u8 reserved;
|
|
|
|
u16 segment;
|
|
|
|
u64 bar;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct dmar_rmrr_entry {
|
|
|
|
u16 type;
|
|
|
|
u16 length;
|
|
|
|
u16 reserved;
|
|
|
|
u16 segment;
|
|
|
|
u64 bar;
|
|
|
|
u64 limit;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* DMAR (DMA Remapping Reporting Structure) */
|
|
|
|
struct __packed acpi_dmar {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
u8 host_address_width;
|
|
|
|
u8 flags;
|
|
|
|
u8 reserved[10];
|
|
|
|
struct dmar_entry structure[0];
|
|
|
|
};
|
|
|
|
|
2020-04-08 22:57:36 +00:00
|
|
|
/* DBG2 definitions are partially used for SPCR interface_type */
|
|
|
|
|
|
|
|
/* Types for port_type field */
|
|
|
|
|
|
|
|
#define ACPI_DBG2_SERIAL_PORT 0x8000
|
|
|
|
#define ACPI_DBG2_1394_PORT 0x8001
|
|
|
|
#define ACPI_DBG2_USB_PORT 0x8002
|
|
|
|
#define ACPI_DBG2_NET_PORT 0x8003
|
|
|
|
|
|
|
|
/* Subtypes for port_subtype field */
|
|
|
|
|
|
|
|
#define ACPI_DBG2_16550_COMPATIBLE 0x0000
|
|
|
|
#define ACPI_DBG2_16550_SUBSET 0x0001
|
|
|
|
#define ACPI_DBG2_ARM_PL011 0x0003
|
|
|
|
#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
|
|
|
|
#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
|
|
|
|
#define ACPI_DBG2_ARM_DCC 0x000F
|
|
|
|
#define ACPI_DBG2_BCM2835 0x0010
|
|
|
|
|
|
|
|
#define ACPI_DBG2_1394_STANDARD 0x0000
|
|
|
|
|
|
|
|
#define ACPI_DBG2_USB_XHCI 0x0000
|
|
|
|
#define ACPI_DBG2_USB_EHCI 0x0001
|
|
|
|
|
|
|
|
#define ACPI_DBG2_UNKNOWN 0x00FF
|
|
|
|
|
2020-09-22 18:45:10 +00:00
|
|
|
/* DBG2: Microsoft Debug Port Table 2 header */
|
|
|
|
struct __packed acpi_dbg2_header {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
u32 devices_offset;
|
|
|
|
u32 devices_count;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* DBG2: Microsoft Debug Port Table 2 device entry */
|
|
|
|
struct __packed acpi_dbg2_device {
|
|
|
|
u8 revision;
|
|
|
|
u16 length;
|
|
|
|
u8 address_count;
|
|
|
|
u16 namespace_string_length;
|
|
|
|
u16 namespace_string_offset;
|
|
|
|
u16 oem_data_length;
|
|
|
|
u16 oem_data_offset;
|
|
|
|
u16 port_type;
|
|
|
|
u16 port_subtype;
|
|
|
|
u8 reserved[2];
|
|
|
|
u16 base_address_offset;
|
|
|
|
u16 address_size_offset;
|
|
|
|
};
|
|
|
|
|
2020-04-08 22:57:36 +00:00
|
|
|
/* SPCR (Serial Port Console Redirection table) */
|
|
|
|
struct __packed acpi_spcr {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
u8 interface_type;
|
|
|
|
u8 reserved[3];
|
|
|
|
struct acpi_gen_regaddr serial_port;
|
|
|
|
u8 interrupt_type;
|
|
|
|
u8 pc_interrupt;
|
|
|
|
u32 interrupt; /* Global system interrupt */
|
|
|
|
u8 baud_rate;
|
|
|
|
u8 parity;
|
|
|
|
u8 stop_bits;
|
|
|
|
u8 flow_control;
|
|
|
|
u8 terminal_type;
|
|
|
|
u8 reserved1;
|
|
|
|
u16 pci_device_id; /* Must be 0xffff if not PCI device */
|
|
|
|
u16 pci_vendor_id; /* Must be 0xffff if not PCI device */
|
|
|
|
u8 pci_bus;
|
|
|
|
u8 pci_device;
|
|
|
|
u8 pci_function;
|
|
|
|
u32 pci_flags;
|
|
|
|
u8 pci_segment;
|
|
|
|
u32 reserved2;
|
|
|
|
};
|
|
|
|
|
2021-12-01 16:03:08 +00:00
|
|
|
/**
|
|
|
|
* struct acpi_gtdt - Generic Timer Description Table (GTDT)
|
|
|
|
*
|
|
|
|
* See ACPI Spec v6.3 section 5.2.24 for details
|
|
|
|
*/
|
|
|
|
struct __packed acpi_gtdt {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
u64 cnt_ctrl_base;
|
|
|
|
u32 reserved0;
|
|
|
|
u32 sec_el1_gsiv;
|
|
|
|
u32 sec_el1_flags;
|
|
|
|
u32 el1_gsiv;
|
|
|
|
u32 el1_flags;
|
|
|
|
u32 virt_el1_gsiv;
|
|
|
|
u32 virt_el1_flags;
|
|
|
|
u32 el2_gsiv;
|
|
|
|
u32 el2_flags;
|
|
|
|
u64 cnt_read_base;
|
|
|
|
u32 plat_timer_count;
|
|
|
|
u32 plat_timer_offset;
|
|
|
|
u32 virt_el2_gsiv;
|
|
|
|
u32 virt_el2_flags;
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct acpi_bgrt - Boot Graphics Resource Table (BGRT)
|
|
|
|
*
|
|
|
|
* Optional table that provides a mechanism to indicate that an image was drawn
|
|
|
|
* on the screen during boot, and some information about the image.
|
|
|
|
*
|
|
|
|
* See ACPI Spec v6.3 section 5.2.22 for details
|
|
|
|
*/
|
|
|
|
struct __packed acpi_bgrt {
|
|
|
|
struct acpi_table_header header;
|
|
|
|
u16 version;
|
|
|
|
u8 status;
|
|
|
|
u8 image_type;
|
|
|
|
u64 addr;
|
|
|
|
u32 offset_x;
|
|
|
|
u32 offset_y;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* Types for PPTT */
|
|
|
|
#define ACPI_PPTT_TYPE_PROC 0
|
|
|
|
#define ACPI_PPTT_TYPE_CACHE 1
|
|
|
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/* Flags for PPTT */
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#define ACPI_PPTT_PHYSICAL_PACKAGE BIT(0)
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#define ACPI_PPTT_PROC_ID_VALID BIT(1)
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#define ACPI_PPTT_PROC_IS_THREAD BIT(2)
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#define ACPI_PPTT_NODE_IS_LEAF BIT(3)
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#define ACPI_PPTT_CHILDREN_IDENTICAL BIT(4)
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/**
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* struct acpi_pptt_header - Processor Properties Topology Table (PPTT) header
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*
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* Describes the topological structure of processors and their shared resources,
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* such as caches.
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*
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* See ACPI Spec v6.3 section 5.2.29 for details
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*/
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struct __packed acpi_pptt_header {
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u8 type; /* ACPI_PPTT_TYPE_... */
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u8 length;
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u16 reserved;
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};
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/**
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* struct acpi_pptt_proc - a processor as described by PPTT
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*/
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struct __packed acpi_pptt_proc {
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struct acpi_pptt_header hdr;
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u32 flags;
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u32 parent;
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u32 proc_id;
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u32 num_resources;
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};
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/* Cache flags for acpi_pptt_cache */
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#define ACPI_PPTT_SIZE_VALID BIT(0)
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#define ACPI_PPTT_SETS_VALID BIT(1)
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#define ACPI_PPTT_ASSOC_VALID BIT(2)
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#define ACPI_PPTT_ALLOC_TYPE_VALID BIT(3)
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#define ACPI_PPTT_CACHE_TYPE_VALID BIT(4)
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#define ACPI_PPTT_WRITE_POLICY_VALID BIT(5)
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#define ACPI_PPTT_LINE_SIZE_VALID BIT(6)
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#define ACPI_PPTT_ALL_VALID 0x7f
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#define ACPI_PPTT_ALL_BUT_WRITE_POL 0x5f
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#define ACPI_PPTT_READ_ALLOC BIT(0)
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#define ACPI_PPTT_WRITE_ALLOC BIT(1)
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#define ACPI_PPTT_CACHE_TYPE_SHIFT 2
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#define ACPI_PPTT_CACHE_TYPE_MASK (3 << ACPI_PPTT_CACHE_TYPE_SHIFT)
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#define ACPI_PPTT_CACHE_TYPE_DATA 0
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#define ACPI_PPTT_CACHE_TYPE_INSTR 1
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#define ACPI_PPTT_CACHE_TYPE_UNIFIED 2
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#define ACPI_PPTT_CACHE_TYPE_DATA 0
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#define ACPI_PPTT_WRITE_THROUGH BIT(4)
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/**
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* struct acpi_pptt_cache - a cache as described by PPTT
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*/
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struct __packed acpi_pptt_cache {
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struct acpi_pptt_header hdr;
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u32 flags;
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u32 next_cache_level;
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u32 size;
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u32 sets;
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u8 assoc;
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u8 attributes;
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u16 line_size;
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|
};
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2020-04-08 22:57:38 +00:00
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/* Tables defined/reserved by ACPI and generated by U-Boot */
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enum acpi_tables {
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ACPITAB_BERT,
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ACPITAB_DBG2,
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ACPITAB_DMAR,
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ACPITAB_DSDT,
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ACPITAB_ECDT,
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ACPITAB_FACS,
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ACPITAB_FADT,
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ACPITAB_HEST,
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ACPITAB_HPET,
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ACPITAB_IVRS,
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ACPITAB_MADT,
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ACPITAB_MCFG,
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ACPITAB_NHLT,
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ACPITAB_RSDP,
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ACPITAB_RSDT,
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ACPITAB_SLIT,
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ACPITAB_SPCR,
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ACPITAB_SPMI,
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ACPITAB_SRAT,
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ACPITAB_SSDT,
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ACPITAB_TCPA,
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ACPITAB_TPM2,
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ACPITAB_VFCT,
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ACPITAB_XSDT,
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ACPITAB_COUNT,
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|
|
|
};
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/**
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|
|
* acpi_get_table_revision() - Get the revision number generated for a table
|
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|
|
*
|
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|
|
* This keeps the version-number information in one place
|
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|
|
*
|
|
|
|
* @table: ACPI table to check
|
2022-01-19 17:05:50 +00:00
|
|
|
* Return: version number that U-Boot generates
|
2020-04-08 22:57:38 +00:00
|
|
|
*/
|
|
|
|
int acpi_get_table_revision(enum acpi_tables table);
|
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|
2020-04-08 22:57:39 +00:00
|
|
|
/**
|
|
|
|
* acpi_create_dmar() - Create a DMA Remapping Reporting (DMAR) table
|
|
|
|
*
|
|
|
|
* @dmar: Place to put the table
|
|
|
|
* @flags: DMAR flags to use
|
2022-01-19 17:05:50 +00:00
|
|
|
* Return: 0 if OK, -ve on error
|
2020-04-08 22:57:39 +00:00
|
|
|
*/
|
|
|
|
int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
|
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|
|
|
2020-09-22 18:45:10 +00:00
|
|
|
/**
|
|
|
|
* acpi_create_dbg2() - Create a DBG2 table
|
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|
|
*
|
|
|
|
* This table describes how to access the debug UART
|
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|
|
*
|
|
|
|
* @dbg2: Place to put information
|
|
|
|
* @port_type: Serial port type (see ACPI_DBG2_...)
|
|
|
|
* @port_subtype: Serial port sub-type (see ACPI_DBG2_...)
|
|
|
|
* @address: ACPI address of port
|
|
|
|
* @address_size: Size of address space
|
|
|
|
* @device_path: Path of device (created using acpi_device_path())
|
|
|
|
*/
|
|
|
|
void acpi_create_dbg2(struct acpi_dbg2_header *dbg2,
|
|
|
|
int port_type, int port_subtype,
|
|
|
|
struct acpi_gen_regaddr *address, uint32_t address_size,
|
|
|
|
const char *device_path);
|
|
|
|
|
2020-04-26 15:19:46 +00:00
|
|
|
/**
|
|
|
|
* acpi_fill_header() - Set up a new table header
|
|
|
|
*
|
|
|
|
* This sets all fields except length, revision, checksum and aslc_revision
|
|
|
|
*
|
|
|
|
* @header: ACPI header to update
|
|
|
|
* @signature: Table signature to use (4 characters)
|
|
|
|
*/
|
|
|
|
void acpi_fill_header(struct acpi_table_header *header, char *signature);
|
|
|
|
|
2020-04-26 15:19:47 +00:00
|
|
|
/**
|
|
|
|
* acpi_align() - Align the ACPI output pointer to a 16-byte boundary
|
|
|
|
*
|
|
|
|
* @ctx: ACPI context
|
|
|
|
*/
|
|
|
|
void acpi_align(struct acpi_ctx *ctx);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* acpi_align64() - Align the ACPI output pointer to a 64-byte boundary
|
|
|
|
*
|
|
|
|
* @ctx: ACPI context
|
|
|
|
*/
|
|
|
|
void acpi_align64(struct acpi_ctx *ctx);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* acpi_inc() - Increment the ACPI output pointer by a bit
|
|
|
|
*
|
|
|
|
* The pointer is NOT aligned afterwards.
|
|
|
|
*
|
|
|
|
* @ctx: ACPI context
|
|
|
|
* @amount: Amount to increment by
|
|
|
|
*/
|
|
|
|
void acpi_inc(struct acpi_ctx *ctx, uint amount);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* acpi_inc_align() - Increment the ACPI output pointer by a bit and align
|
|
|
|
*
|
|
|
|
* The pointer is aligned afterwards to a 16-byte boundary
|
|
|
|
*
|
|
|
|
* @ctx: ACPI context
|
|
|
|
* @amount: Amount to increment by
|
|
|
|
*/
|
|
|
|
void acpi_inc_align(struct acpi_ctx *ctx, uint amount);
|
|
|
|
|
2020-04-26 15:19:50 +00:00
|
|
|
/**
|
|
|
|
* acpi_add_table() - Add a new table to the RSDP and XSDT
|
|
|
|
*
|
|
|
|
* @ctx: ACPI context
|
|
|
|
* @table: Table to add
|
2022-01-19 17:05:50 +00:00
|
|
|
* Return: 0 if OK, -E2BIG if too many tables
|
2020-04-26 15:19:50 +00:00
|
|
|
*/
|
|
|
|
int acpi_add_table(struct acpi_ctx *ctx, void *table);
|
|
|
|
|
2020-11-04 16:57:25 +00:00
|
|
|
/**
|
|
|
|
* acpi_write_rsdp() - Write out an RSDP indicating where the ACPI tables are
|
|
|
|
*
|
|
|
|
* @rsdp: Address to write RSDP
|
|
|
|
* @rsdt: Address of RSDT
|
|
|
|
* @xsdt: Address of XSDT
|
|
|
|
*/
|
|
|
|
void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
|
|
|
|
struct acpi_xsdt *xsdt);
|
|
|
|
|
2021-12-01 16:02:45 +00:00
|
|
|
/**
|
|
|
|
* acpi_fill_header() - Set up a table header
|
|
|
|
*
|
|
|
|
* @header: Pointer to header to set up
|
|
|
|
* @signature: 4-character signature to use (e.g. "FACS")
|
|
|
|
*/
|
|
|
|
void acpi_fill_header(struct acpi_table_header *header, char *signature);
|
|
|
|
|
2021-12-01 16:03:01 +00:00
|
|
|
/**
|
|
|
|
* acpi_fill_csrt() - Fill out the body of the CSRT
|
|
|
|
*
|
|
|
|
* This should write the contents of the Core System Resource Table (CSRT)
|
|
|
|
* to the context. The header (struct acpi_table_header) has already been
|
|
|
|
* written.
|
|
|
|
*
|
|
|
|
* @ctx: ACPI context to write to
|
|
|
|
* @return 0 if OK, -ve on error
|
|
|
|
*/
|
|
|
|
int acpi_fill_csrt(struct acpi_ctx *ctx);
|
|
|
|
|
2022-01-29 21:30:52 +00:00
|
|
|
/**
|
|
|
|
* write_acpi_tables() - Write out the ACPI tables
|
|
|
|
*
|
|
|
|
* This writes all ACPI tables to the given address
|
|
|
|
*
|
|
|
|
* @start: Start address for the tables
|
|
|
|
* @return address of end of tables, where the next tables can be written
|
|
|
|
*/
|
|
|
|
ulong write_acpi_tables(ulong start);
|
|
|
|
|
2023-05-04 22:54:58 +00:00
|
|
|
/**
|
|
|
|
* acpi_find_table() - Look up an ACPI table
|
|
|
|
*
|
|
|
|
* @sig: Signature of table (4 characters, upper case)
|
|
|
|
* Return: pointer to table header, or NULL if not found
|
|
|
|
*/
|
|
|
|
struct acpi_table_header *acpi_find_table(const char *sig);
|
|
|
|
|
2020-04-08 22:57:37 +00:00
|
|
|
#endif /* !__ACPI__*/
|
|
|
|
|
2020-04-08 22:57:36 +00:00
|
|
|
#include <asm/acpi_table.h>
|
|
|
|
|
|
|
|
#endif /* __ACPI_TABLE_H__ */
|