u-boot/arch/sh/include/asm/cpu_sh4.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 */

#ifndef _ASM_CPU_SH4_H_
#define _ASM_CPU_SH4_H_

/* cache control */
#define CCR_CACHE_STOP   0x00000808
#define CCR_CACHE_ENABLE 0x00000101
#define CCR_CACHE_ICI    0x00000800

#define CACHE_OC_ADDRESS_ARRAY	0xf4000000

#if defined (CONFIG_CPU_SH7750) || \
	defined(CONFIG_CPU_SH7751)
#define CACHE_OC_WAY_SHIFT	14
#define CACHE_OC_NUM_ENTRIES	512
#else
#define CACHE_OC_WAY_SHIFT	13
#define CACHE_OC_NUM_ENTRIES	256
#endif
#define CACHE_OC_ENTRY_SHIFT	5

#if defined (CONFIG_CPU_SH7750) || \
	defined(CONFIG_CPU_SH7751)
# include <asm/cpu_sh7750.h>
#elif defined (CONFIG_CPU_SH7722)
# include <asm/cpu_sh7722.h>
#elif defined (CONFIG_CPU_SH7723)
# include <asm/cpu_sh7723.h>
#elif defined (CONFIG_CPU_SH7734)
# include <asm/cpu_sh7734.h>
#elif defined (CONFIG_CPU_SH7752)
# include <asm/cpu_sh7752.h>
#elif defined (CONFIG_CPU_SH7753)
# include <asm/cpu_sh7753.h>
#elif defined (CONFIG_CPU_SH7757)
# include <asm/cpu_sh7757.h>
#elif defined (CONFIG_CPU_SH7763)
# include <asm/cpu_sh7763.h>
#elif defined (CONFIG_CPU_SH7780)
# include <asm/cpu_sh7780.h>
#else
# error "Unknown SH4 variant"
#endif

#endif	/* _ASM_CPU_SH4_H_ */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00			`/*`
sh: Add support SH7780 SH7780 is CPU of Renesas Technology. This CPU has - CPU clock 400MHz - PCI support - DDR-SDRAM controller - etc ... Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-03-05 05:23:26 +00:00			`* (C) Copyright 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00			`*/`

sh: First support code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-05-13 11:58:00 +00:00			`#ifndef _ASM_CPU_SH4_H_`
			`#define _ASM_CPU_SH4_H_`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00
			`/* cache control */`
			`#define CCR_CACHE_STOP 0x00000808`
			`#define CCR_CACHE_ENABLE 0x00000101`
			`#define CCR_CACHE_ICI 0x00000800`

			`#define CACHE_OC_ADDRESS_ARRAY 0xf4000000`
sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT SH4 is different a value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT every CPU. This patch corrects these values. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-11-25 02:05:19 +00:00
			`#if defined (CONFIG_CPU_SH7750) \|\| \`
			`defined(CONFIG_CPU_SH7751)`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00			`#define CACHE_OC_WAY_SHIFT 14`
			`#define CACHE_OC_NUM_ENTRIES 512`
sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT SH4 is different a value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT every CPU. This patch corrects these values. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-11-25 02:05:19 +00:00			`#else`
			`#define CACHE_OC_WAY_SHIFT 13`
			`#define CACHE_OC_NUM_ENTRIES 256`
			`#endif`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00			`#define CACHE_OC_ENTRY_SHIFT 5`

sh: Add support SuperH SH7751/SH7751R Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-03-12 03:10:28 +00:00			`#if defined (CONFIG_CPU_SH7750) \|\| \`
			`defined(CONFIG_CPU_SH7751)`
			`# include <asm/cpu_sh7750.h>`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00			`#elif defined (CONFIG_CPU_SH7722)`
sh: Add support SuperH SH7751/SH7751R Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-03-12 03:10:28 +00:00			`# include <asm/cpu_sh7722.h>`
sh: add support Renesas SH7723 Renesas SH7723 has 5 SCIF, SD, Camera, LCDC and other. This patch supports CPU register's header file and SCIF serial driver. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-08-22 08:48:51 +00:00			`#elif defined (CONFIG_CPU_SH7723)`
			`# include <asm/cpu_sh7723.h>`
sh: Add support Renesas SH7734 Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2012-01-11 01:45:01 +00:00			`#elif defined (CONFIG_CPU_SH7734)`
			`# include <asm/cpu_sh7734.h>`
sh: add support for sh7752evb board The R0P7752C00000RZ board has SH7752, 512MB DDR3-SDRAM, SPI ROM, Gigabit Ethernet, and eMMC. This patch supports the following functions: - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2012-11-04 15:53:22 +00:00			`#elif defined (CONFIG_CPU_SH7752)`
			`# include <asm/cpu_sh7752.h>`
sh: add support for sh7753evb board The SH7753 EVB board has SH7753, 512MB DDR3-SDRAM, SPI ROM, Gigabit Ethernet, and eMMC. This patch support the following functions: - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2013-12-18 07:03:44 +00:00			`#elif defined (CONFIG_CPU_SH7753)`
			`# include <asm/cpu_sh7753.h>`
sh: add support for sh7757lcr board The R0P7757LC0030RL board has SH7757, 256MB DDR3-SDRAM, SPI ROM, Ethernet, and more. This patch supports the following functions: - 256MB DDR3-SDRAM - SPI ROM - Ethernet Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2011-02-02 01:05:36 +00:00			`#elif defined (CONFIG_CPU_SH7757)`
			`# include <asm/cpu_sh7757.h>`
sh: Add support Renesas SH7763 Renesas SH7763 has 3 SCIF, MMC, LCDC, Ethernet and other. This patch supprts CPU register's header file. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-06-06 07:24:13 +00:00			`#elif defined (CONFIG_CPU_SH7763)`
			`# include <asm/cpu_sh7763.h>`
sh: Add support SH7780 SH7780 is CPU of Renesas Technology. This CPU has - CPU clock 400MHz - PCI support - DDR-SDRAM controller - etc ... Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-03-05 05:23:26 +00:00			`#elif defined (CONFIG_CPU_SH7780)`
sh: Add support SuperH SH7751/SH7751R Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-03-12 03:10:28 +00:00			`# include <asm/cpu_sh7780.h>`
sh: First support code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-05-13 11:58:00 +00:00			`#else`
sh: Add support SuperH SH7751/SH7751R Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2008-03-12 03:10:28 +00:00			`# error "Unknown SH4 variant"`
sh: First support code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-05-13 11:58:00 +00:00			`#endif`
sh: Update core code of SuperH. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 2007-09-22 17:12:30 +00:00
			`#endif /* _ASM_CPU_SH4_H_ */`