u-boot/arch/arm/mach-zynqmp-r5/Kconfig

# SPDX-License-Identifier: GPL-2.0

if ARCH_ZYNQMP_R5

config SYS_BOARD
	string "Board name"
	default "zynqmp_r5"

config SYS_VENDOR
	string "Vendor name"
	default "xilinx"

config SYS_SOC
	default "zynqmp-r5"

config SYS_CONFIG_NAME
	string "Board configuration name"
	default "xilinx_zynqmp_r5"
	help
	  This option contains information about board configuration name.
	  Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
	  will be used for board configuration.

config CPU_FREQ_HZ
	int "CPU frequency"
	default 800000000
	help
	  The value, in Hz, that the CPU clock is running at.

config SYS_MALLOC_F_LEN
	default 0x600

endif
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-04-12 15:39:46 +00:00			`# SPDX-License-Identifier: GPL-2.0`

			`if ARCH_ZYNQMP_R5`

			`config SYS_BOARD`
			`string "Board name"`
			`default "zynqmp_r5"`

			`config SYS_VENDOR`
			`string "Vendor name"`
			`default "xilinx"`

			`config SYS_SOC`
			`default "zynqmp-r5"`

			`config SYS_CONFIG_NAME`
			`string "Board configuration name"`
			`default "xilinx_zynqmp_r5"`
			`help`
			`This option contains information about board configuration name.`
			`Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header`
			`will be used for board configuration.`

Convert CONFIG_CPU_FREQ_HZ to Kconfig This converts the following to Kconfig: CONFIG_CPU_FREQ_HZ Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Tom Rini <trini@konsulko.com> 2021-12-17 23:08:42 +00:00			`config CPU_FREQ_HZ`
			`int "CPU frequency"`
			`default 800000000`
			`help`
			`The value, in Hz, that the CPU clock is running at.`

arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-04-12 15:39:46 +00:00			`config SYS_MALLOC_F_LEN`
			`default 0x600`

			`endif`