2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2008-03-26 17:52:33 +00:00
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/*
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* (C) Copyright 2007-2008
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2011-10-31 23:00:39 +00:00
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* Stelian Pop <stelian@popies.net>
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2008-03-26 17:52:33 +00:00
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* Lead Tech Design <www.leadtechdesign.com>
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*/
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#include <common.h>
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2017-04-18 07:18:49 +00:00
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#include <debug_uart.h>
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2019-12-28 17:45:05 +00:00
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#include <init.h>
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2019-12-28 17:44:48 +00:00
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#include <net.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2011-06-06 00:13:10 +00:00
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#include <asm/io.h>
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2008-03-26 17:52:33 +00:00
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#include <asm/arch/at91sam9260_matrix.h>
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2008-05-08 20:52:10 +00:00
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#include <asm/arch/at91sam9_smc.h>
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2009-03-21 20:07:59 +00:00
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#include <asm/arch/at91_common.h>
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2016-02-03 02:16:50 +00:00
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#include <asm/arch/clk.h>
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2008-03-26 17:52:33 +00:00
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#include <asm/arch/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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*/
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#ifdef CONFIG_CMD_NAND
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static void at91sam9260ek_nand_hw_init(void)
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{
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2011-06-06 00:13:10 +00:00
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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2008-03-26 17:52:33 +00:00
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unsigned long csa;
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2011-06-06 00:13:10 +00:00
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/* Assign CS3 to NAND/SmartMedia Interface */
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csa = readl(&matrix->ebicsa);
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
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writel(csa, &matrix->ebicsa);
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2008-03-26 17:52:33 +00:00
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/* Configure SMC CS3 for NAND/SmartMedia */
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2011-06-06 00:13:10 +00:00
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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2008-10-16 13:01:15 +00:00
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#ifdef CONFIG_SYS_NAND_DBW_16
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2011-06-06 00:13:10 +00:00
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AT91_SMC_MODE_DBW_16 |
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2008-10-16 13:01:15 +00:00
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#else /* CONFIG_SYS_NAND_DBW_8 */
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2011-06-06 00:13:10 +00:00
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AT91_SMC_MODE_DBW_8 |
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2008-05-08 18:52:18 +00:00
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#endif
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2011-06-06 00:13:10 +00:00
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AT91_SMC_MODE_TDF_CYCLE(2),
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&smc->cs[3].mode);
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2008-03-26 17:52:33 +00:00
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/* Configure RDY/BSY */
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2009-03-22 09:22:34 +00:00
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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2008-03-26 17:52:33 +00:00
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/* Enable NandFlash */
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2009-03-22 09:22:34 +00:00
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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2011-06-06 00:13:10 +00:00
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2008-03-26 17:52:33 +00:00
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}
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#endif
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2017-04-18 07:18:49 +00:00
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#ifdef CONFIG_DEBUG_UART_BOARD_INIT
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void board_debug_uart_init(void)
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{
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at91_seriald_hw_init();
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}
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#endif
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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2011-06-06 00:13:10 +00:00
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int board_early_init_f(void)
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2008-03-26 17:52:33 +00:00
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{
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2011-06-06 00:13:10 +00:00
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return 0;
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}
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2017-04-18 07:18:49 +00:00
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#endif
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2011-06-06 00:13:10 +00:00
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int board_init(void)
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{
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2008-03-26 17:52:33 +00:00
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/* adress of boot parameters */
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2011-06-06 00:13:10 +00:00
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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2008-03-26 17:52:33 +00:00
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#ifdef CONFIG_CMD_NAND
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at91sam9260ek_nand_hw_init();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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2011-06-06 00:13:10 +00:00
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gd->ram_size = get_ram_size(
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(void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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2008-03-26 17:52:33 +00:00
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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}
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#endif
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