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u-boot/configs/phycore-imx8mp_defconfig

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board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-21 00:22:39 +00:00
CONFIG_TEXT_BASE=0x40200000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 12:19:22 +00:00
CONFIG_SYS_MALLOC_LEN=0x2000000
Rename GPIO_SUPPORT to GPIO Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:30 +00:00
CONFIG_SPL_GPIO=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_DM_GPIO=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk"
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_PHYCORE_IMX8MP=y
board: phytec: phycore-imx8mp: Add EEPROM detection initialisation Add EEPROM detection initialisation for phyCORE-i.MX8MM and print SoM information during boot when successful. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Yannic Moog <y.moog@phytec.de> Tested-by: Yannic Moog <y.moog@phytec.de>
2023-08-17 08:57:08 +00:00
CONFIG_PHYTEC_SOM_DETECTION=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-29 14:43:26 +00:00
CONFIG_SYS_MONITOR_LEN=524288
mmc: Rename MMC_SUPPORT to MMC Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> [trini: Fixup some incorrect renames] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-08 18:20:09 +00:00
CONFIG_SPL_MMC=y
serial: Rename SERIAL_SUPPORT to SERIAL Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-08 18:20:12 +00:00
CONFIG_SPL_SERIAL=y
Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISC Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:31 +00:00
CONFIG_SPL_DRIVERS_MISC=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 14:58:06 +00:00
CONFIG_SPL_STACK=0x960000
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-23 14:25:31 +00:00
CONFIG_SYS_LOAD_ADDR=0x40480000
configs: phycore-imx8mp_defconfig: Enable LTO Enable LTO for binary size reduction. Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2023-06-14 12:36:47 +00:00
CONFIG_LTO=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig This converts the following to Kconfig: CONFIG_USE_BOOTCOMMAND CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND CONFIG_NFSBOOTCOMMAND Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-10 14:11:40 +00:00
CONFIG_USE_BOOTCOMMAND=y
phycore-imx8mp: add support for booting and flashing emmc via UUU add support for Serial Downloader Boot via UUU as well as flashing emmc via UUU on USB0 Port of phyBOARD Pollux. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:11 +00:00
CONFIG_BOOTCOMMAND="if test ${dofastboot} = 1; then fastboot 0; fi; mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_DEFAULT_FDT_FILE="oftree"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2024-01-03 14:26:16 +00:00
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_BOARD_LATE_INIT=y
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-16 21:20:26 +00:00
CONFIG_SPL_MAX_SIZE=0x26000
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-27 14:19:45 +00:00
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x98fc00
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-19 19:09:22 +00:00
CONFIG_SPL_BSS_MAX_SIZE=0x400
board: phytec: phycore_imx8mp: Set VDD_ARM to 0,95V Increase VDD_ARM to prevent timing issues as VDD_SOC is used in OD mode. Also increase GIC clock. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-07-07 12:58:01 +00:00
CONFIG_SPL_BOARD_INIT=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-26 17:13:21 +00:00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_... We like to put the SPL first so it is clear that it relates to SPL. Rename various malloc-related options which have crept in, to stick to this convention. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-09-26 14:14:16 +00:00
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
Convert CONFIG_CONS_INDEX et al to Kconfig This converts the following to Kconfig: CONFIG_CONS_INDEX CONFIG_DEBUG_UART_CLOCK CONFIG_FSL_TZPC_BP147 CONFIG_GENERIC_ATMEL_MCI CONFIG_IDENT_STRING CONFIG_LIBATA CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_LPC32XX_GPIO CONFIG_MP CONFIG_MPC8XXX_GPIO CONFIG_MTD_PARTITIONS CONFIG_MVGBE CONFIG_MXC_GPIO CONFIG_NR_DRAM_BANKS CONFIG_OF_BOARD_SETUP CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_OF_SYSTEM_SETUP CONFIG_PREBOOT CONFIG_ROCKCHIP_SERIAL CONFIG_RTC_ENABLE_32KHZ_OUTPUT CONFIG_RTC_MV CONFIG_SCSI_AHCI CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_SPEED CONFIG_SOFT_SPI CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_MACRONIX CONFIG_SPI_FLASH_MTD CONFIG_SPI_FLASH_SPANSION CONFIG_SPI_FLASH_SST CONFIG_SPI_FLASH_STMICRO CONFIG_SUPPORT_RAW_INITRD CONFIG_SYS_ARCH_TIMER CONFIG_SYS_BOARD CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE CONFIG_SYS_DCACHE_OFF CONFIG_SYS_FDT_SAVE_ADDRESS CONFIG_SYS_FLASH_CFI CONFIG_SYS_FSL_ERRATUM_ESDHC135 CONFIG_SYS_HAS_SERDES CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_LITTLE_ENDIAN CONFIG_SYS_LOAD_ADDR CONFIG_SYS_MMCSD_FS_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR CONFIG_SYS_NS16550 CONFIG_SYS_PLLFIN CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_TIMER_SYS_TICK_CH CONFIG_USB_EHCI_FSL CONFIG_U_QE CONFIG_VERSION_VARIABLE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-11 19:55:51 +00:00
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
i2c: Rename SPL/TPL_I2C_SUPPORT to I2C Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-11 03:14:36 +00:00
CONFIG_SPL_I2C=y
Rename SPL_POWER_SUPPORT to SPL_POWER Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-11 03:14:24 +00:00
CONFIG_SPL_POWER=y
Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOG Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-11 03:14:28 +00:00
CONFIG_SPL_WATCHDOG=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_HUSH_PARSER=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-02 14:35:27 +00:00
CONFIG_SYS_PROMPT="u-boot=> "
Convert CONFIG_SYS_MAXARGS to Kconfig This converts the following to Kconfig: CONFIG_SYS_MAXARGS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-11 20:21:06 +00:00
CONFIG_SYS_MAXARGS=64
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_EEPROM=y
Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to Kconfig - Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR based on current usage. - Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS to Kconfig. We move these symbols around a bit and add appropriate dependencies to them. In some cases, we now add a correct default value as well. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-17 21:59:45 +00:00
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_SYS_EEPROM_SIZE=4096
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_CMD_CLK=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
phycore-imx8mp: add USB host support The phyBOARD Pollux has two USB ports. Add support for USB host and USB storage for the USB1 port. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:09 +00:00
CONFIG_CMD_USB=y
phycore-imx8mp: add support for booting and flashing emmc via UUU add support for Serial Downloader Boot via UUU as well as flashing emmc via UUU on USB0 Port of phyBOARD Pollux. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:11 +00:00
CONFIG_CMD_USB_SDP=y
phycore-imx8mp: add USB mass storage support add support for USB mass storage to USB0 port of phyBOARD Pollux. tested with "ums 0 mmc 2" Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:10 +00:00
CONFIG_CMD_USB_MASS_STORAGE=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
board: phytec: phycore_imx8mp: Add fec support Enable support for the fec ethernet on phyCORE-i.MX8MP. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-07 12:58:00 +00:00
CONFIG_NET_RANDOM_ETHADDR=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
phycore-imx8mp: add support for booting and flashing emmc via UUU add support for Serial Downloader Boot via UUU as well as flashing emmc via UUU on USB0 Port of phyBOARD Pollux. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:11 +00:00
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x42800000
CONFIG_FASTBOOT_BUF_SIZE=0x13000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=2
CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
CONFIG_FASTBOOT_MMC_BOOT1_NAME="mmc2boot0"
CONFIG_FASTBOOT_MMC_BOOT2_NAME="mmc2boot1"
CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
board: freescale: drop CONFIG_DM_I2C undefs Drop CONFIG_DM_I2C undefs from board header files, and make them disabled on these boards in defconfigs instead. Disabling on Kconfig symbol was done automatically with this script: cd configs files=(*ls1046a*) files2=(*T104*RDB*) files3=(ls1021atwr_*) files4=("imx8mp_evk_defconfig phycore-imx8mp_defconfig") combine=("${files[@]}" "${files2[@]}" "${files3[@]}" "${files4[@]}") cd .. for item in ${combine[*]} do echo "Adjusting $item" echo "# CONFIG_SPL_DM_I2C is not set" >> configs/$item make $item && make savedefconfig && cp defconfig configs/$item done Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-09 11:52:44 +00:00
# CONFIG_SPL_DM_I2C is not set
Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACY First, we convert CONFIG_SYS_I2C_LEGACY to Kconfig. Next, as you cannot have SYS_I2C_LEGACY and DM_I2C at the same time, introduce CONFIG_SPL_SYS_I2C_LEGACY so that we can enable the legacy option only in SPL. Finally, for some PowerPC cases we also need CONFIG_TPL_SYS_I2C_LEGACY support. Convert all of the existing users to one or more symbols. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-19 03:12:24 +00:00
CONFIG_SPL_SYS_I2C_LEGACY=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x51
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
Convert CONFIG_FSL_USDHC to Kconfig This converts the following to Kconfig: CONFIG_FSL_USDHC Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-08 03:59:37 +00:00
CONFIG_FSL_USDHC=y
board: phytec: phycore_imx8mp: Add fec support Enable support for the fec ethernet on phyCORE-i.MX8MP. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-07 12:58:00 +00:00
CONFIG_PHYLIB=y
CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH_PHY=y
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
CONFIG_MII=y
phycore-imx8mp: add USB host support The phyBOARD Pollux has two USB ports. Add support for USB host and USB storage for the USB1 port. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:09 +00:00
CONFIG_PHY_IMX8MQ_USB=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
i2c: Convert CONFIG_POWER_I2C et al to Kconfig This converts the following to Kconfig: CONFIG_POWER_I2C CONFIG_POWER_LEGACY They are handled at the same time due to a dependency between them. Update the Makefile rule to use legacy power only in U-Boot proper. Unfortunately a separate rule is needed in SPL to be able to build legacy power. Add SPL related symbols for both, to allow for SPL-only usage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> [trini: More SPL related cleanups, reword commit message] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-08 18:20:27 +00:00
CONFIG_SPL_POWER_LEGACY=y
phycore-imx8mp: add support for booting and flashing emmc via UUU add support for Serial Downloader Boot via UUU as well as flashing emmc via UUU on USB0 Port of phyBOARD Pollux. Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:11 +00:00
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
Convert CONFIG_POWER_PCA9450 to Kconfig This converts the following to Kconfig: CONFIG_POWER_PCA9450 Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-02 21:42:26 +00:00
CONFIG_POWER_PCA9450=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
i2c: Convert CONFIG_POWER_I2C et al to Kconfig This converts the following to Kconfig: CONFIG_POWER_I2C CONFIG_POWER_LEGACY They are handled at the same time due to a dependency between them. Update the Makefile rule to use legacy power only in U-Boot proper. Unfortunately a separate rule is needed in SPL to be able to build legacy power. Add SPL related symbols for both, to allow for SPL-only usage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> [trini: More SPL related cleanups, reword commit message] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-08 18:20:27 +00:00
CONFIG_SPL_POWER_I2C=y
imx: imx8m[m/p]_phycore: Enable DM_SERIAL Enable CONFIG_DM_SERIAL. uart and its pinmux was already marked with u-boot,dm-spl. Move preloader_console_init after spl_early_init to make sure driver model work. Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-11 12:20:58 +00:00
CONFIG_DM_SERIAL=y
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
phycore-imx8mp_defconfig: Enable CONFIG_IMX_TMU Enable the imx thermal driver to prevent booting when the system is too hot. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-20 10:41:43 +00:00
CONFIG_IMX_TMU=y
phycore-imx8mp: add USB host support The phyBOARD Pollux has two USB ports. Add support for USB host and USB storage for the USB1 port. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:09 +00:00
CONFIG_USB=y
phycore-imx8mp: add USB mass storage support add support for USB mass storage to USB0 port of phyBOARD Pollux. tested with "ums 0 mmc 2" Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:10 +00:00
CONFIG_DM_USB_GADGET=y
phycore-imx8mp: add USB host support The phyBOARD Pollux has two USB ports. Add support for USB host and USB storage for the USB1 port. Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:09 +00:00
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
phycore-imx8mp: add USB mass storage support add support for USB mass storage to USB0 port of phyBOARD Pollux. tested with "ums 0 mmc 2" Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-02-08 12:03:10 +00:00
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="FSL"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support Add initial support PHYTEC phyCORE-i.MX8MP SOM. Supported features: - 2GB LPDDR4 RAM - eMMC - external SD - debug UART2 - watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-13 15:28:09 +00:00
CONFIG_IMX_WATCHDOG=y
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