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275 lines
8.9 KiB
ReStructuredText
275 lines
8.9 KiB
ReStructuredText
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.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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.. sectionauthor:: Bryan Brattlof <bb@ti.com>
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K3 Generation
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=============
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Summary
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-------
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Texas Instrument's K3 family of SoCs utilize a heterogeneous multicore
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and highly integrated device architecture targeted to maximize
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performance and power efficiency for a wide range of industrial,
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automotive and other broad market segments.
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Typically the processing cores and the peripherals for these devices are
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partitioned into three functional domains to provide ultra-low power
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modes as well as accommodating application and industrial safety systems
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on the same SoC. These functional domains are typically called the:
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* Wakeup (WKUP) domain
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* Micro-controller (MCU) domain
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* Main domain
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For a more detailed view of what peripherals are attached to each
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domain, consult the device specific documentation.
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K3 Based SoCs
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-------------
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.. toctree::
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:maxdepth: 1
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j721e_evm
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am62x_sk
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Boot Flow Overview
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------------------
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For all K3 SoCs the first core started will be inside the Security
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Management Subsystem (SMS) which will secure the device and start a core
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in the wakeup domain to run the ROM code. ROM will then initialize the
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boot media needed to load the binaries packaged inside `tiboot3.bin`,
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including a 32bit U-Boot SPL, (called the wakup SPL) that ROM will jump
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to after it has finished loading everything into internal SRAM.
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.. code-block:: text
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| WKUP Domain
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ROM -> WKUP SPL ->
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The wakeup SPL, running on a wakeup domain core, will initialize DDR and
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any peripherals needed load the larger binaries inside the `tispl.bin`
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into DDR. Once loaded the wakeup SPL will start one of the 'big'
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application cores inside the main domain to initialize the main domain,
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starting with ARM Trusted Firmware (ATF), before moving on to start
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OPTEE and the main domain's U-Boot SPL.
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.. code-block:: text
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| WKUP Domain | Main Domain ->
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ROM -> WKUP SPL -> ATF -> OPTEE -> Main SPL
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The main domain's SPL, running on a 64bit application core, has
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virtually unlimited space (billions of bytes now that DDR is working) to
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initialize even more peripherals needed to load in the `u-boot.img`
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which loads more firmware into the micro-controller & wakeup domains and
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finally prepare the main domain to run Linux.
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.. code-block:: text
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| WKUP Domain | Main Domain ->
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ROM -> WKUP SPL -> ATF -> OPTEE -> Main SPL -> UBoot -> Linux
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This is the typical boot flow for all K3 based SoCs, however this flow
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offers quite a lot in the terms of flexibility, especially on High
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Security (HS) SoCs.
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Boot Flow Variations
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^^^^^^^^^^^^^^^^^^^^
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All K3 SoCs will generally use the above boot flow with two main
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differences depending on the capabilities of the boot ROM and the number
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of cores inside the device. These differences split the bootflow into
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essentially 4 unique but very similar flows:
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* Split binary with a combined firmware: (eg: AM65)
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* Combined binary with a combined firmware: (eg: AM64)
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* Split binary with a split firmware: (eg: J721E)
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* Combined binary with a split firmware: (eg: AM62)
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For devices that utilize the split binary approach, ROM is not capable
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of loading the firmware into the SoC requiring the wakeup domain's
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U-Boot SPL to load the firmware.
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Devices with a split firmware will have two firmwares loaded into the
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device at different times during the bootup process. TI's Foundational
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Security (TIFS), needed to operate the Security Management Subsystem,
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will either be loaded by ROM or the WKUP U-Boot SPL, then once the
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wakeup U-Boot SPL has completed, the second Device Management (DM)
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firmware can be loaded on the now free core in the wakeup domain.
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For more information on the bootup process of your SoC, consult the
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device specific boot flow documentation.
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Software Sources
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----------------
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All scripts and code needed to build the `tiboot3.bin`, `tispl.bin` and
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`u-boot.img` for all K3 SoCs can be located at the following places
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online
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* **Das U-Boot**
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| **source:** https://source.denx.de/u-boot/u-boot.git
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| **branch:** master
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* **K3 Image Gen**
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| **source:** https://git.ti.com/git/k3-image-gen/k3-image-gen.git
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| **branch:** master
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* **ARM Trusted Firmware (ATF)**
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| **source:** https://github.com/ARM-software/arm-trusted-firmware.git
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| **branch:** master
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* **Open Portable Trusted Execution Environment (OPTEE)**
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| **source:** https://github.com/OP-TEE/optee_os.git
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| **branch:** master
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* **TI Firmware (TIFS, DM, DSMC)**
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| **source:** https://git.ti.com/git/processor-firmware/ti-linux-firmware.git
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| **branch:** ti-linux-firmware
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* **TI's Security Development Tools**
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| **source:** https://git.ti.com/git/security-development-tools/core-secdev-k3.git
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| **branch:** master
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Build Procedure
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---------------
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Depending on the specifics of your device, you will need three or more
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binaries to boot your SoC.
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* `tiboot3.bin` (bootloader for the wakeup domain)
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* `tispl.bin` (bootloader for the main domain)
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* `u-boot.img`
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During the bootup process, both the 32bit wakeup domain and the 64bit
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main domains will be involved. This means everything inside the
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`tiboot3.bin` running in the wakeup domain will need to be compiled for
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32bit cores and most binaries in the `tispl.bin` will need to be
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compiled for 64bit main domain CPU cores.
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All of that to say you will need both a 32bit and 64bit cross compiler
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(assuming you're using an x86 desktop)
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.. code-block:: bash
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export CC32=arm-linux-gnueabihf-
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export CC64=aarch64-linux-gnu-
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Building tiboot3.bin
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^^^^^^^^^^^^^^^^^^^^^
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1. To generate the U-Boot SPL for the wakeup domain, use the following
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commands, substituting :code:`{SOC}` for the name of your device (eg:
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am62x)
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.. code-block:: bash
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# inside u-boot source
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make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32 {SOC}_evm_r5_defconfig
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make ARCH=arm O=build/wkup CROSS_COMPILE=$CC32
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2. Next we will use the K3 Image Gen scripts to package the various
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firmware and the wakeup UBoot SPL into the final `tiboot3.bin`
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binary. (or the `sysfw.itb` if your device uses the split binary
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flow)
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.. code-block:: bash
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# inside k3-image-gen source
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make CROSS_COMPILE=$CC32 SOC={SOC} SOC_TYPE={hs,gp} \
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TI_SECURE_DEV_PKG=<path/to/securit-development-tools> \
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SYSFW_PATH=<path/to/ti-sysfw/ti-fs-firmware-{SOC}-{hs|gp}.bin> \
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SYSFW_HS_INNER_CERT_PATH=<path/to/ti-sysfw/ti-fs-firmware-{SOC}-hs-cert.bin
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For devices that use the *combined binary flow*, you will also need to
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supply the location of the SPL we created in step 1 above, so it can be
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packaged into the final `tiboot3.bin`.
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.. code-block:: bash
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SBL=<path/to/wakeup/u-boot-spl.bin>
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At this point you should have all the needed binaries to boot the wakeup
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domain of your K3 SoC.
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**Combined Binary Boot Flow** (eg: am62x, am64x, ... )
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`k3-image-gen/tiboot3-{SOC}-{hs,gp}-evm.bin`
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**Split Binary Boot Flow** (eg: j721e, am65x)
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| `u-boot/build/wkup/tiboot3.bin`
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| `k3-image-gen/sysfw-{SOC}-evm.bin`
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.. note ::
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It's important to rename the generated `tiboot3.bin` and `sysfw.itb`
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to match exactly `tiboot3.bin` and `sysfw.itb` as ROM and the wakeup
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UBoot SPL will only look for and load the files with these names.
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Building tispl.bin
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^^^^^^^^^^^^^^^^^^^
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The `tispl.bin` is a standard fitImage combining the firmware need for
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the main domain to function properly as well as Device Management (DM)
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firmware if your device using a split firmware.
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3. We will first need ATF, as it's the first thing to run on the 'big'
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application cores on the main domain.
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.. code-block:: bash
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# inside arm-trusted-firmware source
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make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 \
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TARGET_BOARD={lite|generic} \
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SPD=opteed \
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Typically all `j7*` devices will use `TARGET_BOARD=generic` while all
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Sitara (`am6*`) devices use the `lite` option.
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4. The Open Portable Trusted Execution Environment (OPTEE) is designed
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to run as a companion to a non-secure Linux kernel for Cortex-A cores
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using the TrustZone technology built into the core.
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.. code-block:: bash
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# inside optee_os source
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make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 \
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PLATFORM=k3 CFG_ARM64_core=y
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5. Finally, after ATF has initialized the main domain and OPTEE has
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finished, we can jump back into U-Boot again, this time running on a
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64bit core in the main domain.
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.. code-block:: bash
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# inside u-boot source
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make ARCH=arm O=build/main CROSS_COMPILE=$CC64 {SOC}_evm_a{53,72}_defconfig
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make ARCH=arm O=build/main CROSS_COMPILE=$CC64 \
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ATF=<path/to/atf/bl31.bin \
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TEE=<path/to/optee/tee-pager_v2.bin
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If your device uses a split firmware, you will also need to supply the
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path to the Device Management (DM) Firmware to be included in the final
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`tispl.bin` binary
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.. code-block:: bash
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DM=<path/to/ti-linux-firmware/ti-dm/ipc_echo_testb_mcu1_0_release_strip.xer5f>
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At this point you should have every binary needed initialize both the
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wakeup and main domain and to boot to the U-Boot prompt
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**Main Domain Bootloader**
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| `u-boot/build/main/tispl.bin`
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| `u-boot/build/main/u-boot.img`
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