2022-06-17 10:47:20 +00:00
|
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
|
|
|
/*
|
|
|
|
* Copyright 2022 Google LLC
|
|
|
|
*/
|
|
|
|
#ifndef __SOCFGPA_CHAMELEONV3_H__
|
|
|
|
#define __SOCFGPA_CHAMELEONV3_H__
|
|
|
|
|
|
|
|
#include <asm/arch/base_addr_a10.h>
|
|
|
|
|
|
|
|
/*
|
|
|
|
* U-Boot general configurations
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Memory configurations */
|
|
|
|
#define PHYS_SDRAM_1_SIZE 0x40000000
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Serial / UART configurations
|
|
|
|
*/
|
2022-11-16 18:10:41 +00:00
|
|
|
#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
|
2022-06-17 10:47:20 +00:00
|
|
|
|
2022-12-04 15:03:50 +00:00
|
|
|
#define CFG_EXTRA_ENV_SETTINGS \
|
2023-02-21 15:17:02 +00:00
|
|
|
"distro_bootcmd=bridge enable; " \
|
|
|
|
"load mmc 0:1 ${loadaddr} u-boot.txt; " \
|
|
|
|
"env import -t ${loadaddr}; " \
|
|
|
|
"run bootcmd_txt\0"
|
2022-06-17 10:47:20 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* L4 OSC1 Timer 0
|
|
|
|
*/
|
|
|
|
/* reload value when timer count to zero */
|
|
|
|
#define TIMER_LOAD_VAL 0xFFFFFFFF
|
|
|
|
|
|
|
|
/* The rest of the configuration is shared */
|
|
|
|
#include <configs/socfpga_common.h>
|
|
|
|
|
|
|
|
#endif /* __SOCFGPA_CHAMELEONV3_H__ */
|