2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2014-02-07 07:07:36 +00:00
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/*
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* common.c
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*
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* common board functions for B&R boards
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*
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2015-05-28 13:41:12 +00:00
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* Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
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2014-02-07 07:07:36 +00:00
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* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
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*
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*/
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2015-02-03 12:22:26 +00:00
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#include <version.h>
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2014-02-07 07:07:36 +00:00
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#include <common.h>
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2019-08-01 15:46:46 +00:00
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#include <env.h>
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2019-04-10 12:13:11 +00:00
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#include <fdtdec.h>
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2014-02-07 07:07:36 +00:00
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#include <i2c.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2020-05-10 17:40:11 +00:00
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#include <linux/delay.h>
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2014-02-07 07:07:36 +00:00
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#include "bur_common.h"
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2015-02-03 12:22:26 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2014-02-07 07:07:36 +00:00
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/* --------------------------------------------------------------------------*/
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2015-02-03 12:22:26 +00:00
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2020-06-26 06:13:33 +00:00
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int ft_board_setup(void *blob, struct bd_info *bd)
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2018-07-06 13:41:20 +00:00
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{
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int nodeoffset;
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nodeoffset = fdt_path_offset(blob, "/factory-settings");
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if (nodeoffset < 0) {
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2018-07-06 13:41:25 +00:00
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printf("%s: cannot find /factory-settings, trying /fset\n",
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__func__);
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nodeoffset = fdt_path_offset(blob, "/fset");
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if (nodeoffset < 0) {
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printf("%s: cannot find /fset.\n", __func__);
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return 0;
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}
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2018-07-06 13:41:20 +00:00
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}
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2018-07-06 13:41:25 +00:00
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2018-07-06 13:41:20 +00:00
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if (fdt_setprop(blob, nodeoffset, "bl-version",
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PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
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2018-07-06 13:41:25 +00:00
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printf("%s: no 'bl-version' prop in fdt!\n", __func__);
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return 0;
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2018-07-06 13:41:20 +00:00
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}
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return 0;
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}
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2019-04-10 12:13:13 +00:00
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int brdefaultip_setup(int bus, int chip)
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{
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int rc;
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struct udevice *i2cdev;
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u8 u8buf = 0;
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char defip[256] = { 0 };
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rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev);
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if (rc != 0) {
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printf("WARN: cannot probe baseboard EEPROM!\n");
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return -1;
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}
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rc = dm_i2c_read(i2cdev, 0, &u8buf, 1);
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if (rc != 0) {
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printf("WARN: cannot read baseboard EEPROM!\n");
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return -1;
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}
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if (u8buf != 0xFF)
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snprintf(defip, sizeof(defip),
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"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.%d; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
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u8buf);
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else
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strncpy(defip,
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"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
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sizeof(defip));
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env_set("brdefaultip", defip);
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env_set_hex("board_id", u8buf);
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return 0;
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}
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2019-04-10 12:13:12 +00:00
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int overwrite_console(void)
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{
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return 1;
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}
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2019-04-10 12:13:11 +00:00
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX)
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#include <asm/arch/hardware.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <power/tps65217.h>
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2018-07-06 13:41:28 +00:00
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static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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2019-01-31 08:24:45 +00:00
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void pmicsetup(u32 mpupll, unsigned int bus)
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2014-02-07 07:07:36 +00:00
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{
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int mpu_vdd;
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int usb_cur_lim;
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2019-01-31 08:24:45 +00:00
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if (power_tps65217_init(bus)) {
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printf("WARN: cannot setup PMIC 0x24 @ bus #%d, not found!.\n",
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bus);
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2014-02-07 07:07:36 +00:00
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return;
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}
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/* Get the frequency which is defined by device fuses */
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dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
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printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
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if (0 != mpupll) {
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2018-07-06 13:41:23 +00:00
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dpll_mpu_opp100.m = mpupll;
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2014-02-07 07:07:36 +00:00
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printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
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} else {
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puts("ok.\n");
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}
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/*
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* Increase USB current limit to 1300mA or 1800mA and set
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* the MPU voltage controller as needed.
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*/
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if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
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usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
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} else {
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usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
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mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
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}
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if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
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usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
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puts("tps65217_reg_write failure\n");
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/* Set DCDC3 (CORE) voltage to 1.125V */
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if (tps65217_voltage_update(TPS65217_DEFDCDC3,
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TPS65217_DCDC_VOLT_SEL_1125MV)) {
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puts("tps65217_voltage_update failure\n");
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return;
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}
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/* Set CORE Frequencies to OPP100 */
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do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
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/* Set DCDC2 (MPU) voltage */
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if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
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puts("tps65217_voltage_update failure\n");
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return;
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}
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/* Set LDO3 to 1.8V */
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if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
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TPS65217_DEFLS1,
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TPS65217_LDO_VOLTAGE_OUT_1_8,
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TPS65217_LDO_MASK))
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puts("tps65217_reg_write failure\n");
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/* Set LDO4 to 3.3V */
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if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
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TPS65217_DEFLS2,
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TPS65217_LDO_VOLTAGE_OUT_3_3,
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TPS65217_LDO_MASK))
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puts("tps65217_reg_write failure\n");
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/* Set MPU Frequency to what we detected now that voltages are set */
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do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
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2015-02-03 12:22:26 +00:00
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/* Set PWR_EN bit in Status Register */
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tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
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TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
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2014-02-07 07:07:36 +00:00
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}
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void set_uart_mux_conf(void)
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{
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enable_uart0_pin_mux();
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}
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void set_mux_conf_regs(void)
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{
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enable_board_pin_mux();
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}
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2019-04-10 12:13:11 +00:00
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#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */
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