u-boot/arch/xtensa/cpu/Makefile

#
# (C) Copyright 2007 - 2013 Tensilica, Inc.
# (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
#
# SPDX-License-Identifier:	GPL-2.0+
#

obj-y = cpu.o exceptions.o
extra-y = start.o
xtensa: add support for the xtensa processor architecture [2/2] The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> 2016-08-10 15:36:44 +00:00			`#`
			`# (C) Copyright 2007 - 2013 Tensilica, Inc.`
			`# (C) Copyright 2014 - 2016 Cadence Design Systems Inc.`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

			`obj-y = cpu.o exceptions.o`
			`extra-y = start.o`