2018-09-05 13:12:35 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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2023-08-22 03:17:01 +00:00
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#include <event.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2020-02-03 14:36:16 +00:00
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#include <malloc.h>
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2020-11-12 08:35:33 +00:00
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#include <asm/addrspace.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2018-09-05 13:12:35 +00:00
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#include <linux/io.h>
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#include <linux/sizes.h>
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2020-04-21 07:28:34 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2018-09-05 13:12:35 +00:00
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int dram_init(void)
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{
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2022-05-20 03:22:21 +00:00
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gd->ram_size = get_ram_size((void *)KSEG1, CONFIG_MAX_MEM_SIZE << 20);
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2018-09-05 13:12:35 +00:00
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return 0;
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}
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2019-05-28 06:11:37 +00:00
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2023-08-22 03:17:01 +00:00
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#ifndef CONFIG_SPL_BUILD
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static int last_stage_init(void)
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2019-05-28 06:11:37 +00:00
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{
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void *src, *dst;
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src = malloc(SZ_64K);
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dst = malloc(SZ_64K);
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if (!src || !dst) {
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printf("Can't allocate buffer for cache cleanup copy!\n");
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return 0;
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}
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/*
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* It has been noticed, that sometimes the d-cache is not in a
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* "clean-state" when U-Boot is running on MT7688. This was
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* detected when using the ethernet driver (which uses d-cache)
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* and a TFTP command does not complete. Copying an area of 64KiB
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* in DDR at a very late bootup time in U-Boot, directly before
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* calling into the prompt, seems to fix this issue.
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*/
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memcpy(dst, src, SZ_64K);
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free(src);
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free(dst);
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return 0;
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}
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2023-08-22 03:17:01 +00:00
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EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
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#endif
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