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u-boot/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi

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arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support Add support for selecting the appropriate DTS file depending on the SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if there isn't a DTS file specifically made for the current SERDES protocol. This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1. On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs (Realtek RTL8211FD-CG), as well as 2 input/output connectors for mezzanine cards. Configuration signals from the Qixis FPGA control the routing of the external MDIOs. Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one of the 2 IO slots. As a consequence, a new node is added to describe register 0x54 as a MDIO mux controlled with child nodes describing all the IO slots as MDIO buses. Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled implement the board_fit_config_name_match() function in order to choose the appropriate DTS. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-15 06:56:48 +00:00
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* NXP LS1088AQDS device tree source for SERDES block #1 - protocol 29 (0x1d)
*
* Copyright 2020 NXP
*/
#include "fsl-ls1088a-qds.dtsi"
&dpmac1 {
status = "okay";
net: replace the "xfi" phy-mode with "10gbase-r" As part of the effort of making U-Boot work with the same device tree as Linux, there is an issue with the "xfi" phy-mode. To be precise, in Linux there was a discussion (for those who have time to read: https://lore.kernel.org/netdev/1576768881-24971-2-git-send-email-madalin.bucur@oss.nxp.com/) which led to a patch: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c114574ebfdf42f826776f717c8056a00fa94881 TL;DR: "xfi" was standardized in Linux as "10gbase-r". This patch changes the relevant occurrences in U-Boot to use "10gbase-r" instead of "xfi" wherever applicable. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-18 12:32:34 +00:00
phy-connection-type = "10gbase-r";
arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support Add support for selecting the appropriate DTS file depending on the SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if there isn't a DTS file specifically made for the current SERDES protocol. This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1. On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs (Realtek RTL8211FD-CG), as well as 2 input/output connectors for mezzanine cards. Configuration signals from the Qixis FPGA control the routing of the external MDIOs. Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one of the 2 IO slots. As a consequence, a new node is added to describe register 0x54 as a MDIO mux controlled with child nodes describing all the IO slots as MDIO buses. Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled implement the board_fit_config_name_match() function in order to choose the appropriate DTS. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-15 06:56:48 +00:00
};
&dpmac2 {
status = "okay";
net: replace the "xfi" phy-mode with "10gbase-r" As part of the effort of making U-Boot work with the same device tree as Linux, there is an issue with the "xfi" phy-mode. To be precise, in Linux there was a discussion (for those who have time to read: https://lore.kernel.org/netdev/1576768881-24971-2-git-send-email-madalin.bucur@oss.nxp.com/) which led to a patch: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c114574ebfdf42f826776f717c8056a00fa94881 TL;DR: "xfi" was standardized in Linux as "10gbase-r". This patch changes the relevant occurrences in U-Boot to use "10gbase-r" instead of "xfi" wherever applicable. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-09-18 12:32:34 +00:00
phy-connection-type = "10gbase-r";
arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support Add support for selecting the appropriate DTS file depending on the SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if there isn't a DTS file specifically made for the current SERDES protocol. This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1. On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs (Realtek RTL8211FD-CG), as well as 2 input/output connectors for mezzanine cards. Configuration signals from the Qixis FPGA control the routing of the external MDIOs. Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one of the 2 IO slots. As a consequence, a new node is added to describe register 0x54 as a MDIO mux controlled with child nodes describing all the IO slots as MDIO buses. Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled implement the board_fit_config_name_match() function in order to choose the appropriate DTS. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-15 06:56:48 +00:00
};
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