u-boot/arch/arm/dts/fsl-lx2160a-qds-sd1-20.dtsi

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// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 20
*
* Some assumptions are made:
* * 2 mezzanine cards M13 are connected to IO SLOT1 and IO SLOT2
* (xlaui4 for DPMAC 1,2)
*
* Copyright 2020 NXP
*
*/
#include "fsl-lx2160a-qds.dtsi"
&dpmac1 {
status = "okay";
phy-handle = <&cortina_phy1_0>;
phy-connection-type = "xlaui4";
};
&dpmac2 {
status = "okay";
phy-handle = <&cortina_phy2_0>;
phy-connection-type = "xlaui4";
};
&emdio1_slot1 {
cortina_phy1_0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
};
};
&emdio1_slot2 {
cortina_phy2_0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0x0>;
};
};