2019-05-07 18:21:52 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
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*/
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#include "rk3399-u-boot.dtsi"
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2020-07-19 19:55:58 +00:00
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rockchip: gru: Add more devicetree settings
This adds some devicetree settings for the Gru-based boards, based on
what works on a Kevin board.
Gru-based boards usually have an 8MiB SPI flash chip and boot from it.
Make the u-boot.rom file intended to be flashed on it match its size.
Add properties for booting from SPI, and only try to boot from SPI as
MMC and SD card don't seem to work in SPL yet.
The Chromium OS EC needs a delay between transactions so it can get
itself ready. Also it currently uses a non-standard way of specifying
the interrupt. Add these so that the EC works reliably.
The Rockchip Embedded DisplayPort driver is looking for a rockchip,panel
property to find the panel it should work on. Add the property for the
Gru-based boards.
The U-Boot GPIO controlled regulator driver only considers the
"enable-gpios" devicetree property, not the singular "enable-gpio" one.
Some devicetree source files have the singular form as they were added
to Linux kernel when it used that form, and imported to U-Boot as is.
Fix one instance of this in the Gru boards' devicetree to the form that
works in U-Boot.
The PWM controlled regulator driver complains that there is no init
voltage set for a regulator it drives, though it's not clear which one.
Set them all to the voltage levels coreboot sets them: 900 mV.
The RK3399 SoC needs to know the voltage level that some supplies
provides, including one fixed 1.8V audio-related regulator. Although
this synchronization is currently statically done in the board init
functions, a not-so-hypothetical driver that does this dynamically would
query the regulator only to get -ENODATA and be confused. Make sure
U-Boot knows this supply is at 1.8V by setting its limits to that.
Most of this is a reapplication of commit 08c85b57a5ec ("rockchip: gru:
Add extra device-tree settings") whose changes were removed during a
sync with Linux at commit 167efc2c7a46 ("arm64: dts: rk3399: Sync
v5.7-rc1 from Linux"). Apply things to rk3399-gru-u-boot.dtsi instead so
they don't get lost again.
Signed-off-by: Simon Glass <sjg@chromium.org>
[Alper: move to -u-boot.dtsi, rewrite commit message, add more nodes]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2021-12-24 13:43:44 +00:00
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/ {
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chosen {
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u-boot,spl-boot-order = &spi_flash;
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};
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config {
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u-boot,spl-payload-offset = <0x40000>;
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};
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};
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&binman {
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rom {
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size = <0x800000>;
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};
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};
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&cros_ec {
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ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
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};
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&edp {
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rockchip,panel = <&edp_panel>;
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};
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&pp1800_audio {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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&ppvar_bigcpu_pwm {
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regulator-init-microvolt = <900000>;
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};
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&ppvar_centerlogic_pwm {
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regulator-init-microvolt = <900000>;
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};
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&ppvar_gpu_pwm {
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regulator-init-microvolt = <900000>;
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};
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&ppvar_litcpu_pwm {
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regulator-init-microvolt = <900000>;
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};
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&ppvar_sd_card_io {
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enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
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};
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&spi5 {
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spi-activate-delay = <100>;
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spi-max-frequency = <3000000>;
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spi-deactivate-delay = <200>;
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};
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2020-07-19 19:55:58 +00:00
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&spi_flash {
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u-boot,dm-pre-reloc;
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};
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