2018-12-11 11:34:46 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Collabora Ltd.
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*
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* Based on include/configs/xpress.h:
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* Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
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*/
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#ifndef __PCL063_H
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#define __PCL063_H
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#include <linux/sizes.h>
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#include "mx6_common.h"
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/* SPL options */
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#include "imx6_spl.h"
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/*
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* There is a bug in some i.MX6UL processors that results in the initial
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* portion of OCRAM being unavailable when booting from (at least) an SD
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* card.
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*
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* Tweak the SPL text base address to avoid this.
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*/
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2019-04-10 14:35:32 +00:00
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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2018-12-11 11:34:46 +00:00
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/* Console configs */
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
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/* Miscellaneous configurable options */
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE SZ_256M
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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/* NAND */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"console=ttymxc0,115200n8\0" \
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"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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"fdt_addr_r=0x82000000\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"kernel_addr_r=0x81000000\0" \
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"pxefile_addr_r=0x87100000\0" \
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"ramdisk_addr_r=0x82100000\0" \
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"scriptaddr=0x87000000\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(UBIFS, ubifs, 0) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#endif /* __PCL063_H */
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