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u-boot/arch/arm/mach-imx/speed.c

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
// SPDX-License-Identifier: GPL-2.0+
fsl_esdhc: add support for mx51 processor The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-02-05 14:11:27 +00:00
/*
* (C) Copyright 2000-2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*/
#include <common.h>
#include <asm/arch/imx-regs.h>
MX51: removed warnings for the mx51evk The patch removes warnings at compile time and provides some cleanup code: - Removed comment on NAND (not yet supported) from lowlevel_init.S - Removed NFMS bit definition from imx-regs.h The bit is only related to MX.25/35 and can lead to confusion - Moved is_soc_rev() to soc specific code (removed from mx51evk.c) Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-03-05 16:54:37 +00:00
#include <asm/arch/clock.h>
fsl_esdhc: add support for mx51 processor The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-02-05 14:11:27 +00:00
Move DECLARE_GLOBAL_DATA_PTR to file scope It can be optimised out by the compiler otherwise resulting in obscure errors like a board not booting. This has been documented in README since 2006 when these were first fixed up for GCC 4.x. Signed-off-by: John Rigby <john.rigby@linaro.org> Fix some additional places. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
2010-12-21 01:27:51 +00:00
#ifdef CONFIG_FSL_ESDHC
DECLARE_GLOBAL_DATA_PTR;
#endif
fsl_esdhc: add support for mx51 processor The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-02-05 14:11:27 +00:00
int get_clocks(void)
{
#ifdef CONFIG_FSL_ESDHC
i.MX6 USDHC: Use the ESDHC clock The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC. MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()). Signed-off-by: Michael Langer <michael.langer@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-06-14 03:44:33 +00:00
#ifdef CONFIG_FSL_USDHC
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#else
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#endif
#else
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
i.MX6 USDHC: Use the ESDHC clock The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC. MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()). Signed-off-by: Michael Langer <michael.langer@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-06-14 03:44:33 +00:00
#else
ppc: arm: Move sdhc_clk into arch_global_data This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
2012-12-13 20:49:05 +00:00
gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
mx5/6 clocks: Fix SDHC clocks The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
2012-09-27 10:24:37 +00:00
#endif
i.MX6 USDHC: Use the ESDHC clock The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC. MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()). Signed-off-by: Michael Langer <michael.langer@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-06-14 03:44:33 +00:00
#endif
fsl_esdhc: add support for mx51 processor The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-02-05 14:11:27 +00:00
#endif
return 0;
}
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