mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 16:07:30 +00:00
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/io.h>
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#include <mach/init.h>
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#include <mach/sbc-regs.h>
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#include <mach/sg-regs.h>
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int proxstream2_sbc_init(const struct uniphier_board_data *bd)
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{
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/* necessary for ROM boot ?? */
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/* system bus output enable */
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writel(0x17, PC0CTRL);
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/*
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* Only CS1 is connected to support card.
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* BKSZ[1:0] should be set to "01".
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*/
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writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
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writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
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writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
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writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
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if (boot_is_swapped()) {
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/*
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* Boot Swap On: boot from external NOR/SRAM
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* 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
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*
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* 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
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* 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
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*/
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writel(0x0000bc01, SBBASE0);
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} else {
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/*
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* Boot Swap Off: boot from mask ROM
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* 0x40000000-0x41ffffff: mask ROM
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* 0x42000000-0x43efffff: memory bank (31MB)
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* 0x43f00000-0x43ffffff: peripherals (1MB)
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*/
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writel(0x0000be01, SBBASE0); /* dummy */
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writel(0x0200be01, SBBASE1);
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}
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return 0;
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}
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