2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2015-11-17 06:20:17 +00:00
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/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd
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*/
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#ifndef _ASM_ARCH_GRF_RK3036_H
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#define _ASM_ARCH_GRF_RK3036_H
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struct rk3036_grf {
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unsigned int reserved[0x2a];
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unsigned int gpio0a_iomux;
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unsigned int gpio0b_iomux;
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unsigned int gpio0c_iomux;
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unsigned int gpio0d_iomux;
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unsigned int gpio1a_iomux;
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unsigned int gpio1b_iomux;
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unsigned int gpio1c_iomux;
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unsigned int gpio1d_iomux;
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unsigned int gpio2a_iomux;
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unsigned int gpio2b_iomux;
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unsigned int gpio2c_iomux;
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unsigned int gpio2d_iomux;
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unsigned int reserved2[0x0a];
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unsigned int gpiods;
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unsigned int reserved3[0x05];
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unsigned int gpio0l_pull;
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unsigned int gpio0h_pull;
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unsigned int gpio1l_pull;
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unsigned int gpio1h_pull;
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unsigned int gpio2l_pull;
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unsigned int gpio2h_pull;
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unsigned int reserved4[4];
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unsigned int soc_con0;
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unsigned int soc_con1;
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unsigned int soc_con2;
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unsigned int soc_status0;
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unsigned int reserved5;
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unsigned int soc_con3;
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unsigned int reserved6;
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unsigned int dmac_con0;
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unsigned int dmac_con1;
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unsigned int dmac_con2;
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unsigned int reserved7[5];
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unsigned int uoc0_con5;
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unsigned int reserved8[4];
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unsigned int uoc1_con4;
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unsigned int uoc1_con5;
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unsigned int reserved9;
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unsigned int ddrc_stat;
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unsigned int uoc_con6;
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unsigned int soc_status1;
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unsigned int cpu_con0;
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unsigned int cpu_con1;
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unsigned int cpu_con2;
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unsigned int cpu_con3;
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unsigned int reserved10;
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unsigned int reserved11;
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unsigned int cpu_status0;
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unsigned int cpu_status1;
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unsigned int os_reg[8];
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unsigned int reserved12[6];
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unsigned int dll_con[4];
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unsigned int dll_status[4];
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unsigned int dfi_wrnum;
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unsigned int dfi_rdnum;
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unsigned int dfi_actnum;
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unsigned int dfi_timerval;
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unsigned int nfi_fifo[4];
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unsigned int reserved13[0x10];
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unsigned int usbphy0_con[8];
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unsigned int usbphy1_con[8];
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unsigned int reserved14[0x10];
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unsigned int chip_tag;
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unsigned int sdmmc_det_cnt;
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};
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check_member(rk3036_grf, sdmmc_det_cnt, 0x304);
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#endif
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