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u-boot/arch/m68k/cpu/mcf5445x/start.S

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/*
* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
*
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
* Copyright 2010-2012 Freescale Semiconductor, Inc.
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
*/
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#include <common.h>
Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 12:34:52 +00:00
#include <asm-offsets.h>
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
#include <config.h>
ColdFire: Cache update for all platforms The CF will call cache functions in lib_m68/cache.c and the cache settings are defined in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-12 04:12:53 +00:00
#include <asm/cache.h>
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
#define _START _start
#define _FAULT _fault
#define SAVE_ALL \
move.w #0x2700,%sr; /* disable intrs */ \
subl #60,%sp; /* space for 15 regs */ \
moveml %d0-%d7/%a0-%a6,%sp@;
#define RESTORE_ALL \
moveml %sp@,%d0-%d7/%a0-%a6; \
addl #60,%sp; /* space for 15 regs */ \
rte;
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#if defined(CONFIG_SERIAL_BOOT)
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
#define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
CONFIG_SYS_INIT_RAM_ADDR)
m68k: M54418TWR: drop board/freescale/m54418twr/config.mk The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced by two files: - arch/m68k/cpu/mcf5445x/start.S and include/ - include/configs/M54418TWR.h Replace the references with CONFIG_SYS_TEXT_BASE and delete board/freescale/m54418twr/config.mk. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it>
2015-12-11 03:22:25 +00:00
#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
CONFIG_SYS_INIT_RAM_ADDR)
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
#endif
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
.text
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/*
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
* Vector table. This is used for initial platform startup.
* These vectors are to catch any un-intended traps.
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
*/
_vectors:
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#if defined(CONFIG_SERIAL_BOOT)
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
INITSP: .long 0 /* Initial SP */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_CF_SBF
WS cleanup: remove SPACE(s) followed by TAB Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-27 15:42:39 +00:00
INITPC: .long ASM_DRAMINIT /* Initial PC */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#endif
#ifdef CONFIG_SYS_NAND_BOOT
WS cleanup: remove SPACE(s) followed by TAB Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-27 15:42:39 +00:00
INITPC: .long ASM_DRAMINIT_N /* Initial PC */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#endif
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
#else
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
INITSP: .long 0 /* Initial SP */
WS cleanup: remove SPACE(s) followed by TAB Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-27 15:42:39 +00:00
INITPC: .long _START /* Initial PC */
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
#endif
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
vector02_0F:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* Reserved */
vector10_17:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
vector18_1F:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#if !defined(CONFIG_SERIAL_BOOT)
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* TRAP #0 - #15 */
vector20_2F:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
/* Reserved */
vector30_3F:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
vector64_127:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
vector128_191:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
vector192_255:
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
#endif
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#if defined(CONFIG_SERIAL_BOOT)
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
asm_sbf_img_hdr:
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.long 0x00000000 /* checksum, not yet implemented */
.long 0x00040000 /* image length */
Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-07 19:51:12 +00:00
.long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
asm_dram_init:
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.w #0x2700,%sr /* Mask off Interrupt */
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_SYS_NAND_BOOT
/* for assembly stack */
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
clr.l %sp@-
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#endif
#ifdef CONFIG_CF_SBF
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
movec %d0, %VBR
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
movec %d0, %RAMBAR1
/* initialize general use internal ram */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #0, %d0
move.l #(ICACHE_STATUS), %a1 /* icache */
move.l #(DCACHE_STATUS), %a2 /* dcache */
move.l %d0, (%a1)
move.l %d0, (%a2)
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
/* invalidate and disable cache */
ColdFire: Cache update for all platforms The CF will call cache functions in lib_m68/cache.c and the cache settings are defined in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-12 04:12:53 +00:00
move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
movec %d0, %ACR1
movec %d0, %ACR2
movec %d0, %ACR3
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
clr.l %sp@-
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
m68k: mcf5445x: allow CS0 to be undefined On some boards, CONFIG_SYS_CS0_BASE can be undefined, since CS0 is not connected to any signal. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 22:17:48 +00:00
#ifdef CONFIG_SYS_CS0_BASE
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
/* Must disable global address */
move.l #0xFC008000, %a1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_CS0_BASE), (%a1)
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
move.l #0xFC008008, %a1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
move.l #0xFC008004, %a1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_CS0_MASK), (%a1)
m68k: mcf5445x: allow CS0 to be undefined On some boards, CONFIG_SYS_CS0_BASE can be undefined, since CS0 is not connected to any signal. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 22:17:48 +00:00
#endif
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
#endif /* CONFIG_CF_SBF */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_MCF5441x
/* TC: enable all peripherals,
in the future only enable certain peripherals */
move.l #0xFC04002D, %a1
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#if defined(CONFIG_CF_SBF)
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.b #23, (%a1) /* dspi */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#endif
m68k: mcf5445x: move early ddr init as board-specific For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 19:42:27 +00:00
#endif /* CONFIG_MCF5441x */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
m68k: mcf5445x: move early ddr init as board-specific For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 19:42:27 +00:00
/* mandatory board level ddr-sdram init,
* for both 5441x and 5445x
*/
bsr sbf_dram_init
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_CF_SBF
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
/*
* DSPI Initialization
* a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
* a1 - dspi status
* a2 - dtfr
* a3 - drfr
* a4 - Dst addr
*/
/* Enable pins for DSPI mode - chip-selects are enabled later */
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
asm_dspi_init:
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_MCF5441x
move.l #0xEC09404E, %a1
move.l #0xEC09404F, %a2
move.b #0xFF, (%a1)
move.b #0x80, (%a2)
#endif
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
/* Configure DSPI module */
move.l #0xFC05C000, %a0
move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
move.l #0xFC05C00C, %a0
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_MCF5441x
move.l #0x3E000016, (%a0)
#endif
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
move.l #0xFC05C034, %a2 /* dtfr */
move.l #0xFC05C03B, %a3 /* drfr */
move.l #(ASM_SBF_IMG_HDR + 4), %a1
move.l (%a1)+, %d5
move.l (%a1), %a4
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
move.l #0xFC05C02C, %a1 /* dspi status */
/* Issue commands and address */
move.l #0x8002000B, %d2 /* Fast Read Cmd */
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
move.l #0x80020000, %d2 /* Address byte 2 */
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
move.l #0x80020000, %d2 /* Address byte 1 */
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
move.l #0x80020000, %d2 /* Address byte 0 */
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
move.l #0x80020000, %d2 /* Dummy Wr and Rd */
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
/* Transfer serial boot header to sram */
asm_dspi_rd_loop1:
move.l #0x80020000, %d2
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
move.b %d1, (%a0) /* read, copy to dst */
add.l #1, %a0 /* inc dst by 1 */
sub.l #1, %d4 /* dec cnt by 1 */
bne asm_dspi_rd_loop1
/* Transfer u-boot from serial flash to memory */
asm_dspi_rd_loop2:
move.l #0x80020000, %d2
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
move.b %d1, (%a4) /* read, copy to dst */
add.l #1, %a4 /* inc dst by 1 */
sub.l #1, %d5 /* dec cnt by 1 */
bne asm_dspi_rd_loop2
move.l #0x00020000, %d2 /* Terminate */
jsr asm_dspi_wr_status
jsr asm_dspi_rd_status
/* jump to memory and execute */
Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-07 19:51:12 +00:00
move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
jmp (%a0)
asm_dspi_wr_status:
move.l (%a1), %d0 /* status */
and.l #0x0000F000, %d0
cmp.l #0x00003000, %d0
bgt asm_dspi_wr_status
move.l %d2, (%a2)
rts
asm_dspi_rd_status:
move.l (%a1), %d0 /* status */
and.l #0x000000F0, %d0
lsr.l #4, %d0
cmp.l #0, %d0
beq asm_dspi_rd_status
move.b (%a3), %d1
rts
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
#endif /* CONFIG_CF_SBF */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#ifdef CONFIG_SYS_NAND_BOOT
/* copy 4 boot pages to dram as soon as possible */
/* each page is 996 bytes (1056 total with 60 ECC bytes */
move.l #0x00000000, %a1 /* src */
m68k: M54418TWR: drop board/freescale/m54418twr/config.mk The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced by two files: - arch/m68k/cpu/mcf5445x/start.S and include/ - include/configs/M54418TWR.h Replace the references with CONFIG_SYS_TEXT_BASE and delete board/freescale/m54418twr/config.mk. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it>
2015-12-11 03:22:25 +00:00
move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
move.l #0x3E0, %d0 /* sz in long */
asm_boot_nand_copy:
move.l (%a1)+, (%a2)+
subq.l #1, %d0
bne asm_boot_nand_copy
/* jump to memory and execute */
move.l #(asm_nand_init), %a0
jmp (%a0)
asm_nand_init:
/* exit nand boot-mode */
move.l #0xFC0FFF30, %a1
or.l #0x00000040, %d1
move.l %d1, (%a1)
/* initialize general use internal ram */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #0, %d0
move.l #(CACR_STATUS), %a1 /* CACR */
move.l #(ICACHE_STATUS), %a2 /* icache */
move.l #(DCACHE_STATUS), %a3 /* dcache */
move.l %d0, (%a1)
move.l %d0, (%a2)
move.l %d0, (%a3)
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
/* invalidate and disable cache */
move.l #0x01004100, %d0 /* Invalidate cache cmd */
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
movec %d0, %ACR1
movec %d0, %ACR2
movec %d0, %ACR3
m68k: mcf5445x: allow CS0 to be undefined On some boards, CONFIG_SYS_CS0_BASE can be undefined, since CS0 is not connected to any signal. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 22:17:48 +00:00
#ifdef CONFIG_SYS_CS0_BASE
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
/* Must disable global address */
move.l #0xFC008000, %a1
move.l #(CONFIG_SYS_CS0_BASE), (%a1)
move.l #0xFC008008, %a1
move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
move.l #0xFC008004, %a1
move.l #(CONFIG_SYS_CS0_MASK), (%a1)
m68k: mcf5445x: allow CS0 to be undefined On some boards, CONFIG_SYS_CS0_BASE can be undefined, since CS0 is not connected to any signal. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 22:17:48 +00:00
#endif
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
/* NAND port configuration */
move.l #0xEC094048, %a1
move.b #0xFD, (%a1)+
move.b #0x5F, (%a1)+
move.b #0x04, (%a1)+
/* reset nand */
move.l #0xFC0FFF38, %a1 /* isr */
move.l #0x000e0000, (%a1)
move.l #0xFC0FFF08, %a2
move.l #0x00000000, (%a2)+ /* car */
move.l #0x11000000, (%a2)+ /* rar */
move.l #0x00000000, (%a2)+ /* rpt */
move.l #0x00000000, (%a2)+ /* rai */
move.l #0xFC0FFF2c, %a2 /* cfg */
move.l #0x00000000, (%a2)+ /* secsz */
move.l #0x000e0681, (%a2)+
move.l #0xFC0FFF04, %a2 /* cmd2 */
move.l #0xFF404001, (%a2)
move.l #0x000e0000, (%a1)
move.l #0x2000, %d1
m68k: mcf5445x: move early ddr init as board-specific For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 19:42:27 +00:00
bsr asm_delay
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
/* setup nand */
move.l #0xFC0FFF00, %a1
move.l #0x30700000, (%a1)+ /* cmd1 */
move.l #0x007EF000, (%a1)+ /* cmd2 */
move.l #0xFC0FFF2C, %a1
move.l #0x00000841, (%a1)+ /* secsz */
move.l #0x000e0681, (%a1)+ /* cfg */
move.l #100, %d4 /* 100 pages ~200KB */
move.l #4, %d2 /* start at 4 */
move.l #0xFC0FFF04, %a0 /* cmd2 */
move.l #0xFC0FFF0C, %a1 /* rar */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
asm_nand_read:
move.l #0x11000000, %d0 /* rar */
or.l %d2, %d0
move.l %d0, (%a1)
add.l #1, %d2
move.l (%a0), %d0 /* cmd2 */
or.l #1, %d0
move.l %d0, (%a0)
move.l #0x200, %d1
m68k: mcf5445x: move early ddr init as board-specific For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 19:42:27 +00:00
bsr asm_delay
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
asm_nand_chk_status:
move.l #0xFC0FFF38, %a4 /* isr */
move.l (%a4), %d0
and.l #0x40000000, %d0
tst.l %d0
beq asm_nand_chk_status
move.l #0xFC0FFF38, %a4 /* isr */
move.l (%a4), %d0
or.l #0x000E0000, %d0
move.l %d0, (%a4)
move.l #0x200, %d3
move.l #0xFC0FC000, %a3 /* buf 1 */
asm_nand_copy:
move.l (%a3)+, (%a2)+
subq.l #1, %d3
bgt asm_nand_copy
subq.l #1, %d4
bgt asm_nand_read
/* jump to memory and execute */
m68k: M54418TWR: drop board/freescale/m54418twr/config.mk The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced by two files: - arch/m68k/cpu/mcf5445x/start.S and include/ - include/configs/M54418TWR.h Replace the references with CONFIG_SYS_TEXT_BASE and delete board/freescale/m54418twr/config.mk. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it>
2015-12-11 03:22:25 +00:00
move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
jmp (%a0)
#endif /* CONFIG_SYS_NAND_BOOT */
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
m68k: mcf5445x: move early ddr init as board-specific For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-05-14 19:42:27 +00:00
.globl asm_delay
ColdFire: Update for M54451EVB Update serial boot DRAM's Internal RAM, vector table and DRAM in start.S, serial flash's read status command over SPI and NOR flash. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-06-11 15:39:57 +00:00
asm_delay:
nop
subq.l #1, %d1
bne asm_delay
rts
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.text
ColdFire: Implement SBF feature for M5445EVB Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-24 01:38:53 +00:00
. = 0x400
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.globl _start
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
_start:
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#if !defined(CONFIG_SERIAL_BOOT)
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
nop
nop
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.w #0x2700,%sr /* Mask off Interrupt */
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* Set vector base register at the beginning of the Flash */
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #CONFIG_SYS_FLASH_BASE, %d0
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
movec %d0, %VBR
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
ColdFire: MCF5445x - Update correct RAMBAR and missing linker files Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-11-08 00:00:54 +00:00
movec %d0, %RAMBAR1
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* initialize general use internal ram */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #0, %d0
move.l #(ICACHE_STATUS), %a1 /* icache */
move.l #(DCACHE_STATUS), %a2 /* dcache */
move.l %d0, (%a1)
move.l %d0, (%a2)
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* invalidate and disable cache */
ColdFire: Cache update for all platforms The CF will call cache functions in lib_m68/cache.c and the cache settings are defined in platform configuration file. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2010-03-12 04:12:53 +00:00
move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
movec %d0, %CACR /* Invalidate cache */
move.l #0, %d0
movec %d0, %ACR0
movec %d0, %ACR1
movec %d0, %ACR2
movec %d0, %ACR3
ColdFire: Add MCF5441x CPU support Add MCF5441x CPU support. The MCF5441x devices are a family of highly-integrated 32-bit microprocessors based on the Version 4m ColdFire microarchitecture, comprising of the V4 integer core, memory management unit(MMU) and enchanced multiply-accumulate unit(EMAC). Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-18 19:25:51 +00:00
#else
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
#endif
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: add malloc memory for early malloc To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
2016-04-27 19:50:44 +00:00
/* put relocation table address to a5 */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #__got_start, %a5
m68k: add malloc memory for early malloc To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
2016-04-27 19:50:44 +00:00
/* setup stack initially on top of internal static ram */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
m68k: add malloc memory for early malloc To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
2016-04-27 19:50:44 +00:00
/*
* if configured, malloc_f arena will be reserved first,
* then (and always) gd struct space will be reserved
*/
move.l %sp, -(%sp)
move.l #board_init_f_alloc_reserve, %a1
jsr (%a1)
/* update stack and frame-pointers */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l %d0, %sp
move.l %sp, %fp
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: add malloc memory for early malloc To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
2016-04-27 19:50:44 +00:00
/* initialize reserved area */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l %d0, -(%sp)
m68k: add malloc memory for early malloc To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
2016-04-27 19:50:44 +00:00
move.l #board_init_f_init_reserve, %a1
jsr (%a1)
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: fix broken buildman m68k fix 19/48 broken board compilations, due to a now too smal 16-bit relative jump Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2016-04-11 22:30:59 +00:00
/* run low-level CPU init code (from flash) */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #cpu_init_f, %a1
jsr (%a1)
m68k: fix broken buildman m68k fix 19/48 broken board compilations, due to a now too smal 16-bit relative jump Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2016-04-11 22:30:59 +00:00
/* run low-level board init code (from flash) */
m68k: add malloc memory for early malloc To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
2016-04-27 19:50:44 +00:00
clr.l %sp@-
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #board_init_f, %a1
jsr (%a1)
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* board_init_f() does not return */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
/******************************************************************************/
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/*
common: Move relocate_code() to init.h This is an init function so move it out of the common header. Avoid using the typedef so that we don't have to include the global_data header file. Also tidy up the function style in comments while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-28 17:44:45 +00:00
* void relocate_code(addr_sp, gd, addr_moni)
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r3 = dest
* r4 = src
* r5 = length in bytes
* r6 = cachelinesize
*/
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.globl relocate_code
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
relocate_code:
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
link.w %a6,#0
move.l 8(%a6), %sp /* set new stack pointer */
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
move.l 16(%a6), %a0 /* Save copy of Destination Address */
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l #CONFIG_SYS_MONITOR_BASE, %a1
move.l #__init_end, %a2
move.l %a0, %a3
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* copy the code to RAM */
1:
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l (%a1)+, (%a3)+
cmp.l %a1,%a2
bgt.s 1b
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
move.l %a0, %a1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
jmp (%a1)
in_ram:
clear_bss:
/*
* Now clear BSS segment
*/
move.l %a0, %a1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
move.l %a0, %d1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
6:
clr.l (%a1)+
cmp.l %a1,%d1
bgt.s 6b
/*
* fix got table in RAM
*/
move.l %a0, %a1
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l %a1,%a5 /* fix got pointer register a5 */
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
move.l %a0, %a2
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-16 13:01:15 +00:00
add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
7:
move.l (%a1),%d1
sub.l #_start,%d1
add.l %a0,%d1
move.l %d1,(%a1)+
cmp.l %a2, %a1
bne 7b
/* calculate relative jump to board_init_r in ram */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l %a0, %a1
add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* set parameters for board_init_r */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
move.l %a0,-(%sp) /* dest_addr */
move.l %d0,-(%sp) /* gd */
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
jsr (%a1)
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
/******************************************************************************/
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
/* exception code */
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.globl _fault
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
_fault:
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
bra _fault
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.globl _exc_handler
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
_exc_handler:
SAVE_ALL
movel %sp,%sp@-
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
bsr exc_handler
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
addql #4,%sp
RESTORE_ALL
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.globl _int_handler
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
_int_handler:
SAVE_ALL
movel %sp,%sp@-
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
bsr int_handler
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
addql #4,%sp
RESTORE_ALL
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
/******************************************************************************/
ColdFire: Add M54455EVB for MCF5445x Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
2007-08-16 20:05:11 +00:00
m68k: code reformatting for all start.S files This patch is style-related only, to reformat all the start.S code, actually not following a coherent style inside single files and between different cpu start.S files. Linux format has been respected, as - max line width at 80 columns - one 8 cols tab between asm instructions and operands - inline comments, where any, fixed at col 41 Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-05-21 22:14:29 +00:00
.align 4
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