2014-02-04 08:24:17 +00:00
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####
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# kbuild: Generic definitions
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# Convenient variables
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comma := ,
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2014-04-15 04:29:00 +00:00
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quote := "
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2014-02-04 08:24:17 +00:00
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squote := '
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empty :=
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space := $(empty) $(empty)
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Kbuild: fix # escaping in .cmd files for future Make
[ commit 9564a8cf422d7b58f6e857e3546d346fa970191e in Linux ]
I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
already the objtool build broke with
orc_dump.c: In function ‘orc_dump’:
orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
if (elf_getshdrnum(elf, &nr_sections)) {
Turns out that with that new Make, the backslash was not removed, so cpp
didn't see a #include directive, grep found nothing, and
-DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.
Now, that new Make behaviour is documented in their NEWS file:
* WARNING: Backward-incompatibility!
Number signs (#) appearing inside a macro reference or function invocation
no longer introduce comments and should not be escaped with backslashes:
thus a call such as:
foo := $(shell echo '#')
is legal. Previously the number sign needed to be escaped, for example:
foo := $(shell echo '\#')
Now this latter will resolve to "\#". If you want to write makefiles
portable to both versions, assign the number sign to a variable:
C := \#
foo := $(shell echo '$C')
This was claimed to be fixed in 3.81, but wasn't, for some reason.
To detect this change search for 'nocomment' in the .FEATURES variable.
This also fixes up the two make-cmd instances to replace # with $(pound)
rather than with \#. There might very well be other places that need
similar fixup in preparation for whatever future Make release contains
the above change, but at least this builds an x86_64 defconfig with the
new make.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-19 02:35:56 +00:00
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pound := \#
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2014-02-04 08:24:17 +00:00
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###
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# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
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dot-target = $(dir $@).$(notdir $@)
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###
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# The temporary file to save gcc -MD generated dependencies must not
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# contain a comma
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depfile = $(subst $(comma),_,$(dot-target).d)
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###
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# filename of target with directory and extension stripped
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basetarget = $(basename $(notdir $@))
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###
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# filename of first prerequisite with directory and extension stripped
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baseprereq = $(basename $(notdir $<))
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###
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# Escape single quote for use in echo statements
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escsq = $(subst $(squote),'\$(squote)',$1)
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###
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# Easy method for doing a status message
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kecho := :
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quiet_kecho := echo
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silent_kecho := :
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kecho := $($(quiet)kecho)
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###
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# filechk is used to check if the content of a generated file is updated.
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# Sample usage:
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# define filechk_sample
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# echo $KERNELRELEASE
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# endef
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# version.h : Makefile
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# $(call filechk,sample)
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# The rule defined shall write to stdout the content of the new file.
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# The existing file will be compared with the new one.
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# - If no file exist it is created
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# - If the content differ the new file is used
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# - If they are equal no change, and no timestamp update
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# - stdin is piped in from the first prerequisite ($<) so one has
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# to specify a valid file as first prerequisite (often the kbuild file)
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define filechk
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$(Q)set -e; \
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$(kecho) ' CHK $@'; \
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mkdir -p $(dir $@); \
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$(filechk_$(1)) < $< > $@.tmp; \
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if [ -r $@ ] && cmp -s $@ $@.tmp; then \
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rm -f $@.tmp; \
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else \
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$(kecho) ' UPD $@'; \
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mv -f $@.tmp $@; \
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fi
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endef
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######
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# gcc support functions
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# See documentation in Documentation/kbuild/makefiles.txt
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# cc-cross-prefix
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# Usage: CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu- m68k-linux-)
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# Return first prefix where a prefix$(CC) is found in PATH.
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# If no $(CC) found in PATH with listed prefixes return nothing
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cc-cross-prefix = \
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$(word 1, $(foreach c,$(1), \
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$(shell set -e; \
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if (which $(strip $(c))$(CC)) > /dev/null 2>&1 ; then \
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echo $(c); \
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fi)))
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# output directory for tests below
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TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/)
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# try-run
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# Usage: option = $(call try-run, $(CC)...-o "$$TMP",option-ok,otherwise)
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# Exit code chooses option. "$$TMP" is can be used as temporary file and
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# is automatically cleaned up.
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2014-02-04 08:24:44 +00:00
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# modifed for U-Boot: prevent cc-option from leaving .*.su files
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2014-02-04 08:24:17 +00:00
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try-run = $(shell set -e; \
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TMP="$(TMPOUT).$$$$.tmp"; \
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TMPO="$(TMPOUT).$$$$.o"; \
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2014-02-04 08:24:44 +00:00
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TMPSU="$(TMPOUT).$$$$.su"; \
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2014-02-04 08:24:17 +00:00
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if ($(1)) >/dev/null 2>&1; \
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then echo "$(2)"; \
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else echo "$(3)"; \
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fi; \
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2014-02-04 08:24:44 +00:00
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rm -f "$$TMP" "$$TMPO" "$$TMPSU")
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2014-02-04 08:24:17 +00:00
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# as-option
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# Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,)
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as-option = $(call try-run,\
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$(CC) $(KBUILD_CFLAGS) $(1) -c -x assembler /dev/null -o "$$TMP",$(1),$(2))
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# as-instr
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# Usage: cflags-y += $(call as-instr,instr,option1,option2)
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as-instr = $(call try-run,\
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printf "%b\n" "$(1)" | $(CC) $(KBUILD_AFLAGS) -c -x assembler -o "$$TMP" -,$(2),$(3))
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# cc-option
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# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586)
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cc-option = $(call try-run,\
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2014-07-30 19:54:51 +00:00
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2))
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2014-02-04 08:24:17 +00:00
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# cc-option-yn
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# Usage: flag := $(call cc-option-yn,-march=winchip-c6)
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cc-option-yn = $(call try-run,\
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2014-07-30 19:54:51 +00:00
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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2014-02-04 08:24:17 +00:00
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# cc-option-align
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# Prefix align with either -falign or -malign
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cc-option-align = $(subst -functions=0,,\
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$(call cc-option,-falign-functions=0,-malign-functions=0))
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# cc-disable-warning
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# Usage: cflags-y += $(call cc-disable-warning,unused-but-set-variable)
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cc-disable-warning = $(call try-run,\
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$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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2016-01-20 01:39:01 +00:00
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# cc-name
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# Expands to either gcc or clang
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cc-name = $(shell $(CC) -v 2>&1 | grep -q "clang version" && echo clang || echo gcc)
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2014-02-04 08:24:17 +00:00
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# cc-version
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cc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC))
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# cc-fullversion
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cc-fullversion = $(shell $(CONFIG_SHELL) \
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$(srctree)/scripts/gcc-version.sh -p $(CC))
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# cc-ifversion
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# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
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2015-07-04 16:56:55 +00:00
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cc-ifversion = $(shell [ $(cc-version) $(1) $(2) ] && echo $(3) || echo $(4))
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2014-02-04 08:24:17 +00:00
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2014-02-04 08:24:18 +00:00
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# added for U-Boot
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binutils-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/binutils-version.sh $(AS))
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dtc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/dtc-version.sh $(DTC))
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2014-02-04 08:24:17 +00:00
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# cc-ldoption
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# Usage: ldflags += $(call cc-ldoption, -Wl$(comma)--hash-style=both)
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cc-ldoption = $(call try-run,\
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$(CC) $(1) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2))
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# ld-option
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# Usage: LDFLAGS += $(call ld-option, -X)
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ld-option = $(call try-run,\
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$(CC) -x c /dev/null -c -o "$$TMPO" ; $(LD) $(1) "$$TMPO" -o "$$TMP",$(1),$(2))
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# ar-option
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# Usage: KBUILD_ARFLAGS := $(call ar-option,D)
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# Important: no spaces around options
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ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2))
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2014-04-15 04:29:00 +00:00
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# ld-version
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# Note this is mainly for HJ Lu's 3 number binutil versions
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ld-version = $(shell $(LD) --version | $(srctree)/scripts/ld-version.sh)
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# ld-ifversion
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# Usage: $(call ld-ifversion, -ge, 22252, y)
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2015-07-04 16:56:55 +00:00
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ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4))
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2014-04-15 04:29:00 +00:00
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2014-02-04 08:24:17 +00:00
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######
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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2014-10-30 02:06:13 +00:00
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build := -f $(srctree)/scripts/Makefile.build obj
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2014-02-04 08:24:17 +00:00
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=
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# Usage:
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# $(Q)$(MAKE) $(modbuiltin)=dir
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2014-10-30 02:06:13 +00:00
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modbuiltin := -f $(srctree)/scripts/Makefile.modbuiltin obj
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2014-02-04 08:24:17 +00:00
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2015-07-04 16:56:55 +00:00
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.dtbinst obj=
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# Usage:
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# $(Q)$(MAKE) $(dtbinst)=dir
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dtbinst := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.dtbinst obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj=
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# Usage:
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# $(Q)$(MAKE) $(clean)=dir
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clean := -f $(srctree)/scripts/Makefile.clean obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.headersinst obj=
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# Usage:
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# $(Q)$(MAKE) $(hdr-inst)=dir
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hdr-inst := -f $(srctree)/scripts/Makefile.headersinst obj
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2014-02-04 08:24:17 +00:00
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# Prefix -I with $(srctree) if it is not an absolute path.
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# skip if -I has no parameter
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addtree = $(if $(patsubst -I%,%,$(1)), \
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$(if $(filter-out -I/%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1))) $(1))
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# Find all -I options and call addtree
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flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
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# echo command.
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# Short version is used, if $(quiet) equals `quiet_', otherwise full one.
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echo-cmd = $(if $($(quiet)cmd_$(1)),\
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echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';)
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# printing commands
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cmd = @$(echo-cmd) $(cmd_$(1))
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# Add $(obj)/ for paths that are not absolute
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objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
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###
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# if_changed - execute command if any prerequisite is newer than
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# target, or command line has changed
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# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies
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# including used config symbols
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# if_changed_rule - as if_changed but execute rule instead
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# See Documentation/kbuild/makefiles.txt for more info
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ifneq ($(KBUILD_NOCMDDEP),1)
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# Check if both arguments has same arguments. Result is empty string if equal.
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# User may override this check using make KBUILD_NOCMDDEP=1
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arg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \
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$(filter-out $(cmd_$@), $(cmd_$(1))) )
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else
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arg-check = $(if $(strip $(cmd_$@)),,1)
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endif
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|
2014-10-30 02:06:13 +00:00
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# Replace >$< with >$$< to preserve $ when reloading the .cmd file
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|
# (needed for make)
|
Kbuild: fix # escaping in .cmd files for future Make
[ commit 9564a8cf422d7b58f6e857e3546d346fa970191e in Linux ]
I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
already the objtool build broke with
orc_dump.c: In function ‘orc_dump’:
orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
if (elf_getshdrnum(elf, &nr_sections)) {
Turns out that with that new Make, the backslash was not removed, so cpp
didn't see a #include directive, grep found nothing, and
-DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.
Now, that new Make behaviour is documented in their NEWS file:
* WARNING: Backward-incompatibility!
Number signs (#) appearing inside a macro reference or function invocation
no longer introduce comments and should not be escaped with backslashes:
thus a call such as:
foo := $(shell echo '#')
is legal. Previously the number sign needed to be escaped, for example:
foo := $(shell echo '\#')
Now this latter will resolve to "\#". If you want to write makefiles
portable to both versions, assign the number sign to a variable:
C := \#
foo := $(shell echo '$C')
This was claimed to be fixed in 3.81, but wasn't, for some reason.
To detect this change search for 'nocomment' in the .FEATURES variable.
This also fixes up the two make-cmd instances to replace # with $(pound)
rather than with \#. There might very well be other places that need
similar fixup in preparation for whatever future Make release contains
the above change, but at least this builds an x86_64 defconfig with the
new make.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-19 02:35:56 +00:00
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# Replace >#< with >$(pound)< to avoid starting a comment in the .cmd file
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2014-10-30 02:06:13 +00:00
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# (needed for make)
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# Replace >'< with >'\''< to be able to enclose the whole string in '...'
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# (needed for the shell)
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Kbuild: fix # escaping in .cmd files for future Make
[ commit 9564a8cf422d7b58f6e857e3546d346fa970191e in Linux ]
I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
already the objtool build broke with
orc_dump.c: In function ‘orc_dump’:
orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
if (elf_getshdrnum(elf, &nr_sections)) {
Turns out that with that new Make, the backslash was not removed, so cpp
didn't see a #include directive, grep found nothing, and
-DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.
Now, that new Make behaviour is documented in their NEWS file:
* WARNING: Backward-incompatibility!
Number signs (#) appearing inside a macro reference or function invocation
no longer introduce comments and should not be escaped with backslashes:
thus a call such as:
foo := $(shell echo '#')
is legal. Previously the number sign needed to be escaped, for example:
foo := $(shell echo '\#')
Now this latter will resolve to "\#". If you want to write makefiles
portable to both versions, assign the number sign to a variable:
C := \#
foo := $(shell echo '$C')
This was claimed to be fixed in 3.81, but wasn't, for some reason.
To detect this change search for 'nocomment' in the .FEATURES variable.
This also fixes up the two make-cmd instances to replace # with $(pound)
rather than with \#. There might very well be other places that need
similar fixup in preparation for whatever future Make release contains
the above change, but at least this builds an x86_64 defconfig with the
new make.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-19 02:35:56 +00:00
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make-cmd = $(call escsq,$(subst $(pound),$$(pound),$(subst $$,$$$$,$(cmd_$(1)))))
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2014-02-04 08:24:17 +00:00
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# Find any prerequisites that is newer than target or that does not exist.
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# PHONY targets skipped in both cases.
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any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)
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# Execute command if command has changed or prerequisite(s) are updated.
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#
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if_changed = $(if $(strip $(any-prereq) $(arg-check)), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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2014-10-30 02:06:13 +00:00
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printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd)
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2014-02-04 08:24:17 +00:00
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# Execute the command and also postprocess generated .d dependencies file.
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if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;\
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rm -f $(depfile); \
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mv -f $(dot-target).tmp $(dot-target).cmd)
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# Usage: $(call if_changed_rule,foo)
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# Will check if $(cmd_foo) or any of the prerequisites changed,
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# and if so will execute $(rule_foo).
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if_changed_rule = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(rule_$(1)))
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###
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# why - tell why a a target got build
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# enabled by make V=2
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# Output (listed in the order they are checked):
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# (1) - due to target is PHONY
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# (2) - due to target missing
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# (3) - due to: file1.h file2.h
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# (4) - due to command line change
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# (5) - due to missing .cmd file
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# (6) - due to target not in $(targets)
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# (1) PHONY targets are always build
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# (2) No target, so we better build it
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# (3) Prerequisite is newer than target
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# (4) The command line stored in the file named dir/.target.cmd
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# differed from actual command line. This happens when compiler
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# options changes
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# (5) No dir/.target.cmd file (used to store command line)
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# (6) No dir/.target.cmd file and target not listed in $(targets)
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# This is a good hint that there is a bug in the kbuild file
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ifeq ($(KBUILD_VERBOSE),2)
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why = \
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$(if $(filter $@, $(PHONY)),- due to target is PHONY, \
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$(if $(wildcard $@), \
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$(if $(strip $(any-prereq)),- due to: $(any-prereq), \
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$(if $(arg-check), \
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$(if $(cmd_$@),- due to command line change, \
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$(if $(filter $@, $(targets)), \
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- due to missing .cmd file, \
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- due to $(notdir $@) not in $$(targets) \
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) \
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) \
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) \
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), \
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- due to target missing \
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) \
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)
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echo-why = $(call escsq, $(strip $(why)))
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endif
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kbuild: add a makefile macro useful with per-image config options
Commit e02ee2548afe ("kconfig: switch to single .config
configuration") made the configuration itself pretty simple,
instead, we lost the way to systematically enable/disable config
options for each image independently.
Our current strategy is, put entries into Makefile.spl for options
we need separate enabling, or once enable the options globally in
Kconfig and then undef them in Makefile.uncmd_spl if we do not want
to compile the features for SPL at all. Things are getting really
messy. Besides, "ifdef CONFIG_SPL_BUILD" are sprinkled everywhere
in makefiles.
This commit adds a variable to help describe makefile simpler.
$(SPL_) evaluates to "SPL_" during the SPL build, while to an empty
string during building U-boot proper.
So, you can write
obj-$(CONFIG_$(SPL_)FOO) += foo.o
instead of
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FOO) += foo.o
else
obj-$(CONFIG_FOO) += foo.o
endif
If CONFIG_SPL_FOO does not exist in Kconfig, it is equivalent to
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FOO) += foo.o
endif
This is the pattern we often see in our current makefiles.
To take advantage of this macro, we should prefix SPL_ for the SPL
version of the option when we need independent control between
U-boot and SPL. With this naming scheme, I hope our makefiles will
be much simplified.
It means we want to rename existing config options as follows
in the long run:
CONFIG_SPL_SERIAL_SUPPORT -> CONFIG_SPL_SERIAL
CONFIG_SPL_I2C_SUPPORT -> CONFIG_SPL_I2C
CONFIG_SPL_GPIO_SUPPORT -> CONFIG_SPL_GPIO
CONFIG_SPL_SPI_SUPPORT -> CONFIG_SPL_SPI
CONFIG_SPL_DISABLE_OF_CONTROL -> CONFIG_SPL_OF_CONTROL
(inverting the logic)
Then drivers/Makefile would be re-worked as follows:
obj-$(CONFIG_$(SPL_)SERIAL) += serial/
obj-$(CONFIG_$(SPL_)I2C) += i2c/
obj-$(CONFIG_$(SPL_)GPIO) += gpio/
obj-$(CONFIG_$(SPL_)SPI) += spi/
...
Eventually, SPL-specialized entries in Makefile.spl would go away.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-11 22:31:42 +00:00
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ifdef CONFIG_SPL_BUILD
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SPL_ := SPL_
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2017-04-02 15:50:30 +00:00
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ifeq ($(CONFIG_TPL_BUILD),y)
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SPL_TPL_ := TPL_
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else
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SPL_TPL_ := SPL_
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endif
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kbuild: add a makefile macro useful with per-image config options
Commit e02ee2548afe ("kconfig: switch to single .config
configuration") made the configuration itself pretty simple,
instead, we lost the way to systematically enable/disable config
options for each image independently.
Our current strategy is, put entries into Makefile.spl for options
we need separate enabling, or once enable the options globally in
Kconfig and then undef them in Makefile.uncmd_spl if we do not want
to compile the features for SPL at all. Things are getting really
messy. Besides, "ifdef CONFIG_SPL_BUILD" are sprinkled everywhere
in makefiles.
This commit adds a variable to help describe makefile simpler.
$(SPL_) evaluates to "SPL_" during the SPL build, while to an empty
string during building U-boot proper.
So, you can write
obj-$(CONFIG_$(SPL_)FOO) += foo.o
instead of
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FOO) += foo.o
else
obj-$(CONFIG_FOO) += foo.o
endif
If CONFIG_SPL_FOO does not exist in Kconfig, it is equivalent to
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FOO) += foo.o
endif
This is the pattern we often see in our current makefiles.
To take advantage of this macro, we should prefix SPL_ for the SPL
version of the option when we need independent control between
U-boot and SPL. With this naming scheme, I hope our makefiles will
be much simplified.
It means we want to rename existing config options as follows
in the long run:
CONFIG_SPL_SERIAL_SUPPORT -> CONFIG_SPL_SERIAL
CONFIG_SPL_I2C_SUPPORT -> CONFIG_SPL_I2C
CONFIG_SPL_GPIO_SUPPORT -> CONFIG_SPL_GPIO
CONFIG_SPL_SPI_SUPPORT -> CONFIG_SPL_SPI
CONFIG_SPL_DISABLE_OF_CONTROL -> CONFIG_SPL_OF_CONTROL
(inverting the logic)
Then drivers/Makefile would be re-worked as follows:
obj-$(CONFIG_$(SPL_)SERIAL) += serial/
obj-$(CONFIG_$(SPL_)I2C) += i2c/
obj-$(CONFIG_$(SPL_)GPIO) += gpio/
obj-$(CONFIG_$(SPL_)SPI) += spi/
...
Eventually, SPL-specialized entries in Makefile.spl would go away.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-11 22:31:42 +00:00
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else
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SPL_ :=
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2017-04-02 15:50:30 +00:00
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SPL_TPL_ :=
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kbuild: add a makefile macro useful with per-image config options
Commit e02ee2548afe ("kconfig: switch to single .config
configuration") made the configuration itself pretty simple,
instead, we lost the way to systematically enable/disable config
options for each image independently.
Our current strategy is, put entries into Makefile.spl for options
we need separate enabling, or once enable the options globally in
Kconfig and then undef them in Makefile.uncmd_spl if we do not want
to compile the features for SPL at all. Things are getting really
messy. Besides, "ifdef CONFIG_SPL_BUILD" are sprinkled everywhere
in makefiles.
This commit adds a variable to help describe makefile simpler.
$(SPL_) evaluates to "SPL_" during the SPL build, while to an empty
string during building U-boot proper.
So, you can write
obj-$(CONFIG_$(SPL_)FOO) += foo.o
instead of
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FOO) += foo.o
else
obj-$(CONFIG_FOO) += foo.o
endif
If CONFIG_SPL_FOO does not exist in Kconfig, it is equivalent to
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_FOO) += foo.o
endif
This is the pattern we often see in our current makefiles.
To take advantage of this macro, we should prefix SPL_ for the SPL
version of the option when we need independent control between
U-boot and SPL. With this naming scheme, I hope our makefiles will
be much simplified.
It means we want to rename existing config options as follows
in the long run:
CONFIG_SPL_SERIAL_SUPPORT -> CONFIG_SPL_SERIAL
CONFIG_SPL_I2C_SUPPORT -> CONFIG_SPL_I2C
CONFIG_SPL_GPIO_SUPPORT -> CONFIG_SPL_GPIO
CONFIG_SPL_SPI_SUPPORT -> CONFIG_SPL_SPI
CONFIG_SPL_DISABLE_OF_CONTROL -> CONFIG_SPL_OF_CONTROL
(inverting the logic)
Then drivers/Makefile would be re-worked as follows:
obj-$(CONFIG_$(SPL_)SERIAL) += serial/
obj-$(CONFIG_$(SPL_)I2C) += i2c/
obj-$(CONFIG_$(SPL_)GPIO) += gpio/
obj-$(CONFIG_$(SPL_)SPI) += spi/
...
Eventually, SPL-specialized entries in Makefile.spl would go away.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-11 22:31:42 +00:00
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endif
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