2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2017-07-25 14:30:11 +00:00
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/*
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* Copyright (C) 2014 NVIDIA Corporation
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/gpio.h>
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#include <power/as3722.h>
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#include <power/pmic.h>
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#define NUM_GPIOS 8
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int as3722_gpio_configure(struct udevice *pmic, unsigned int gpio,
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unsigned long flags)
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{
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u8 value = 0;
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int err;
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if (flags & AS3722_GPIO_OUTPUT_VDDH)
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value |= AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
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if (flags & AS3722_GPIO_INVERT)
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value |= AS3722_GPIO_CONTROL_INVERT;
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err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
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if (err) {
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2018-11-18 15:14:28 +00:00
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pr_err("failed to configure GPIO#%u: %d\n", gpio, err);
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2017-07-25 14:30:11 +00:00
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return err;
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}
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return 0;
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}
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static int as3722_gpio_set_value(struct udevice *dev, unsigned int gpio,
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int level)
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{
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struct udevice *pmic = dev_get_parent(dev);
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const char *l;
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u8 value;
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int err;
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if (gpio >= NUM_GPIOS)
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return -EINVAL;
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err = pmic_reg_read(pmic, AS3722_GPIO_SIGNAL_OUT);
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if (err < 0) {
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2018-11-18 15:14:28 +00:00
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pr_err("failed to read GPIO signal out register: %d\n", err);
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2017-07-25 14:30:11 +00:00
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return err;
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}
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value = err;
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if (level == 0) {
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value &= ~(1 << gpio);
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l = "low";
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} else {
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value |= 1 << gpio;
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l = "high";
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}
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err = pmic_reg_write(pmic, AS3722_GPIO_SIGNAL_OUT, value);
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if (err) {
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2018-11-18 15:14:28 +00:00
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pr_err("failed to set GPIO#%u %s: %d\n", gpio, l, err);
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2017-07-25 14:30:11 +00:00
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return err;
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}
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return 0;
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}
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int as3722_gpio_direction_output(struct udevice *dev, unsigned int gpio,
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int value)
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{
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struct udevice *pmic = dev_get_parent(dev);
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int err;
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if (gpio > 7)
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return -EINVAL;
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if (value == 0)
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value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDL;
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else
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value = AS3722_GPIO_CONTROL_MODE_OUTPUT_VDDH;
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err = pmic_reg_write(pmic, AS3722_GPIO_CONTROL(gpio), value);
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if (err) {
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2018-11-18 15:14:28 +00:00
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pr_err("failed to configure GPIO#%u as output: %d\n", gpio,
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err);
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2017-07-25 14:30:11 +00:00
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return err;
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}
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err = as3722_gpio_set_value(pmic, gpio, value);
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if (err < 0) {
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2018-11-18 15:14:28 +00:00
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pr_err("failed to set GPIO#%u high: %d\n", gpio, err);
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2017-07-25 14:30:11 +00:00
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return err;
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}
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return 0;
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}
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static int as3722_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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uc_priv->gpio_count = NUM_GPIOS;
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uc_priv->bank_name = "as3722_";
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return 0;
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}
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static const struct dm_gpio_ops gpio_as3722_ops = {
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.direction_output = as3722_gpio_direction_output,
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.set_value = as3722_gpio_set_value,
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};
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U_BOOT_DRIVER(gpio_as3722) = {
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.name = "gpio_as3722",
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.id = UCLASS_GPIO,
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.ops = &gpio_as3722_ops,
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.probe = as3722_gpio_probe,
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};
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